SCANPSC110FSC ,SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port (IEEE 1149.1 Support)SCANPSC110F SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port (IEEE1149.1 System Test Su ..
SCANPSC110FSC ,SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port (IEEE 1149.1 Support)SCANPSC110F SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port (IEEE1149.1 System Test Su ..
SCANPSC110FSC ,SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port (IEEE 1149.1 Support)SCANPSC110F SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port (IEEE1149.1 System Test Su ..
SCANPSC110FSC ,SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port (IEEE 1149.1 Support)SCANPSC110F SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port (IEEE1149.1 System Test Su ..
SCANSTA101SM ,Low Voltage IEEE 1149.1 STA Masterfeatures of theSTA101 further allow it to offload some of the processor n Uses generic, asynchronou ..
SCANSTA101SM/NOPB ,Low Voltage IEEE 1149.1 System Test Access (STA) Master 49-NFBGA -40 to 85FEATURES DESCRIPTIONThe SCANSTA101 is designed to function as a test2• Compatible with IEEE Std. 11 ..
SFS2955 ,P-CHANNEL POWER MOSFETFEATURESBV = -60 VDSS! Avalanche Rugged TechnologyR = 0.3 ΩDS(on) ! Rugged Gate Oxide Techn ..
SFS9620 ,Advanced Power MOSFETFEATURESBV = -200 VDSS Avalanche Rugged TechnologyR = 1.5 ΩDS(on) Rugged Gate Oxide T ..
SFS9624 ,Advanced Power MOSFETFEATURESBV = -250 VDSS Avalanche Rugged TechnologyR = 2.4 ΩDS(on) Rugged Gate Oxide T ..
SFS9630 ,Advanced Power MOSFETFEATURESBV = -200 VDSS Avalanche Rugged TechnologyR = 0.8 ΩDS(on) Rugged Gate Oxide T ..
SFS9634 ,Advanced Power MOSFETSFS9634Advanced Power MOSFET
SFS9634. ,Advanced Power MOSFETSFS9634Advanced Power MOSFET
SCANPSC110FSC
SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port (IEEE 1149.1 Support)
SCANPSC110F SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port (IEEE1149.1 System Test Support) March 1993 Revised August 2000 SCANPSC110F SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port (IEEE1149.1 System Test Support) General Description Features The SCANPSC110F Bridge extends the IEEE Std. 1149.1True IEEE1149.1 hierarchical and multidrop addressable test bus into a multidrop test bus environment. The advan- capability tage of a hierarchical approach over a single serial scanThe 6 slot inputs support up to 59 unique addresses, a chain is improved test throughput and the ability to remove Broadcast Address, and 4 Multi-cast Group Addresses a board from the system and retain test access to the 3 IEEE 1149.1-compatible configurable local scan ports remaining modules. Each SCANPSC110F Bridge supports Mode Register allows local TAPs to be bypassed, up to 3 local scan rings which can be accessed individually selected for insertion into the scan chain individually, or or combined serially. Addressing is accomplished by load- serially in groups of two or three ing the instruction register with a value matching that of the Slot inputs. Backplane and inter-board testing can easily32-bit TCK counter be accomplished by parking the local TAP Controllers in16-bit LFSR Signature Compactor one of the stable TAP Controller states via a Park instruc- L4 tion. The 32-bit TCK counter enables built in self test oper- local TAPs can be 3-stated via the OE input to allow an ations to be performed on one port while other scan chains alternate test master to take control of the local TAPs are simultaneously tested. Ordering Code: Order Number Package Number Package Description SCANPSC110FSC M28B 28-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Pin Descriptions Pin Description Names TCK Backplane Test Clock Input B TMS Backplane Test Mode Select Input B TDI Backplane Test Data Input B TDO Backplane Test Data Output B TRST Asynchronous Test Reset Input (Active LOW) S Address Select Port (0,5) OE Local Scan Port Output Enable (Active LOW) TCK Local Port Test Clock Output L(1–3) TMS Local Port Test Mode Select Output L(1–3) TDI Local Port Test Data Input L(1–3) TDO Local Port Test Data Output L(1–3) © 2000 DS011570
