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Partno	Mfg	Dc	Qty	Available	Descript
SAF-C165UTAH-LFV1.3 |SAFC165UTAHLFV13	INFINEON	N/a	4	avai	16-Bit Microcontroller with USB and HDLC

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SAF-C165UTAH-LFV1.3
16-Bit Microcontroller with USB and HDLC


C165UTAH
Embedded C166 with USB,
IOM-2 and HDLC Support
Version 1.3
For questions on technology, delivery and prices please contact the Infineon
Technologies Offices in Germany or the Infineon Technologies Companies and
Representatives worldwide: see our webpage at http://www.infineon.com
C165UTAH
Revision History:2001-02-23DS 2
Previous Version: Data Sheet, 10.00, DS11)All previous distributed versions are preliminary. They have been replaced by this version.
PageOverview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
1.1Key Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
1.2Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
1.3Pinning Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
1.4Typical Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
1.4.1ISDN NT and PBX Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.1C165UTAH Pin Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.2C165UTAH Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . 19Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
3.1Basic CPU Concepts and Optimizations . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.2On-Chip System Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
3.3Clock Generation Concept . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
3.4On-Chip Peripheral Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
3.5Protected Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45Memory Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
4.1Internal RAM and SFR Area 48
4.2External Memory Space . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
4.3Crossing Memory Boundaries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54Central Processor Unit 55
5.1Instruction Pipelining . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
5.2Bit-Handling and Bit-Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
5.3Instruction State Times 64
5.4CPU Special Function Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
5.5859393EPEC Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93EPEC Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
6.4EPEC Transfer Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
6.5Implementation of EPEC Interrupt Generation Unit . . . . . . . . . . . . . . . . . 101Interrupt and Trap Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
7.1Interrupt System Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
7.2Interrupt Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
7.3Operation of the PEC Channels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
7.4Prioritization of Interrupt and PEC Service Requests . . . . . . . . . . . . . . . 115
7.5Saving the Status during Interrupt Service . . . . . . . . . . . . . . . . . . . . . . . . 118
7.6Interrupt Response Times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
7.7PEC Response Times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122

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