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Partno	Mfg	Dc	Qty	Available	Descript
PSMN8R0-40BS \|PSMN8R040BS	NXP/PH	N/a	10000	avai	N-channel 40 V 7.6 m鈩?standard level MOSFET in D2PAK

PSMN8R0-40BS ,N-channel 40 V 7.6 m鈩?standard level MOSFET in D2PAKApplications DC-to-DC convertors Motor control Load switching Server power supplies1.4 Quick re ..
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PSMN8R0-40BS
N-channel 40 V 7.6 m鈩?standard level MOSFET in D2PAK
Product profile1.1 General description
Standard level N-channel MOSFET in D2PAK package qualified to 175 °C. This product is
designed and qualified for use in a wide range of industrial, communications and domestic
equipment.
1.2 Features and benefits High efficiency due to low switching
and conduction losses Suitable for standard level gate drive
sources
1.3 Applications DC-to-DC convertors Load switching Motor control Server power supplies
1.4 Quick reference data
PSMN8R0-40BS
N-channel 40 V 7.6 mΩ standard level MOSFET in D2PAK
Rev. 2 — 2 March 2012 Product data sheet
Table 1. Quick reference data
VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C --40 V drain current Tmb =25°C; VGS =10V; see Figure 1 --77 A
Ptot total power dissipation Tmb =25°C; see Figure 2 --86 W
Static characteristics
RDSon drain-source on-state resistance VGS =10V; ID =25A; Tj =25°C;see Figure 13 -6.2 7.6 mΩ
Dynamic characteristics
QGD gate-drain charge VGS =10V; ID =25A; VDS =20V;
see Figure 14; see Figure 15
-3.8 -nC
QG(tot) total gate charge - 21 - nC
Avalanche ruggedness
EDS(AL)S non-repetitive
drain-source
avalanche energy
VGS =10V; Tj(init) =25°C; ID =77A;
Vsup≤40 V; unclamped; RGS =50Ω
--43 mJ
NXP Semiconductors PSMN8R0-40BS
N-channel 40 V 7.6 mΩ standard level MOSFET in D2PAK Pinning information
[1] It is not possible to make connection to pin 2. Ordering information Limiting values
Table 2. Pinning information
Table 3. Ordering information
PSMN8R0-40BS D2PAK plastic single-ended surface-mounted package (D2PAK); 3 leads
(one lead cropped)
SOT404
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - 40 V
VDGR drain-gate voltage Tj≥25 °C; Tj≤ 175 °C; RGS =20kΩ -40 V
VGS gate-source voltage -20 20 V drain current VGS =10V; Tmb= 100 °C; see Figure 1 -55 A
VGS =10V; Tmb =25°C; see Figure 1 -77 A
IDM peak drain current pulsed; tp≤10 µs; Tmb =25°C;
see Figure 3 309 A
Ptot total power dissipation Tmb =25°C; see Figure 2 -86 W
Tstg storage temperature -55 175 °C junction temperature -55 175 °C
Tsld(M) peak soldering temperature - 260 °C
Source-drain diode source current Tmb =25°C - 77 A
ISM peak source current pulsed; tp≤10 µs; Tmb=25°C - 309 A
Avalanche ruggedness
EDS(AL)S non-repetitive drain-source
avalanche energy
VGS =10V; Tj(init) =25°C; ID =77A;
Vsup≤40 V; unclamped; RGS =50Ω
-43 mJ
NXP Semiconductors PSMN8R0-40BS
N-channel 40 V 7.6 mΩ standard level MOSFET in D2PAK
NXP Semiconductors PSMN8R0-40BS
N-channel 40 V 7.6 mΩ standard level MOSFET in D2PAK Thermal characteristics
Table 5. Thermal characteristics
Rth(j-mb) thermal resistance from junction to
mounting base
see Figure 4 -1.2 1.74 K/W
Rth(j-a) thermal resistance from junction to
ambient
minimum footprint; mounted on a
printed circuit board
-50 -K/W
NXP Semiconductors PSMN8R0-40BS
N-channel 40 V 7.6 mΩ standard level MOSFET in D2PAK CharacteristicsTable 6. Characteristics
Tested to JEDEC standards where applicable.
Static characteristics
V(BR)DSS drain-source
breakdown voltage =250 µA; VGS =0V; Tj= -55°C 36 - - V =250 µA; VGS =0V; Tj=25°C 40 --V
VGS(th) gate-source threshold
voltage =1mA; VDS =VGS; Tj =-55 °C;
see Figure 10; see Figure 11
--4.6 V =1mA; VDS =VGS; Tj= 175 °C;
see Figure 10; see Figure 11 --V =1mA; VDS =VGS; Tj =25°C;
see Figure 10; see Figure 11
234V
IDSS drain leakage current VDS =40V; VGS =0V; Tj=25°C --1.5 µA
VDS =40V; VGS =0V; Tj= 125°C --30 µA
IGSS gate leakage current VGS =20V; VDS =0V; Tj=25°C - - 100 nA
VGS =-20 V; VDS =0V; Tj=25°C - - 100 nA
RDSon drain-source on-state
resistance
VGS =10V; ID =25A; Tj= 100 °C;
see Figure 12; see Figure 13
--11 mΩ
VGS =10V; ID =25A; Tj =25°C;
see Figure 13
-6.2 7.6 mΩ internal gate resistance
(AC)
f=1MHz - 1.1 - Ω
Dynamic characteristics
QG(tot) total gate charge ID =0A; VDS =0V; VGS =10V - 17 - nC =25A; VDS =20V; VGS =10V;
see Figure 14; see Figure 15
-21 -nC
QGS gate-source charge - 7.2 - nC
QGS(th) pre-threshold
gate-source charge =25A; VDS =20V; VGS =10V;
see Figure 14
-3.6 -nC
QGS(th-pl) post-threshold
gate-source charge
-3.6 -nC
QGD gate-drain charge ID =25A; VDS =20V; VGS =10V;
see Figure 14; see Figure 15
-3.8 -nC
VGS(pl) gate-source plateau
voltage =25A; VDS =20V; see Figure 14 -4.8 -V
Ciss input capacitance VDS =12V; VGS=0 V; f=1 MHz; =25°C; see Figure 16 1262 - pF
Coss output capacitance - 327 - pF
Crss reverse transfer
capacitance 160 - pF
td(on) turn-on delay time VDS =12V; RL =0.5 Ω; VGS =10V;
RG(ext) =4.7Ω
-12 -ns rise time - 4.7 - ns
td(off) turn-off delay time - 21 - ns fall time - 4.7 - ns
NXP Semiconductors PSMN8R0-40BS
N-channel 40 V 7.6 mΩ standard level MOSFET in D2PAK
Source-drain diode
VSD source-drain voltage IS =25A; VGS =0V; Tj =25°C;
see Figure 17 0.85 1.2 V
trr reverse recovery time IS =50A; dIS/dt= -100 A/µs; VGS =0V;
VDS =20V
-30 -ns recovered charge IS =50A; dIS/dt= -100 A/µs; VGS =0V;
VDS =20V; Tj =25°C
-18 -nC
Table 6. Characteristics …continued
Tested to JEDEC standards where applicable.
NXP Semiconductors PSMN8R0-40BS
N-channel 40 V 7.6 mΩ standard level MOSFET in D2PAK

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