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PSMN5R5-60YS |PSMN5R560YSPHILIPSN/a100avaiN-channel LFPAK 60 V, 5.2 m惟 standard level FET
PSMN5R5-60YS |PSMN5R560YSNXPN/a1469avaiN-channel LFPAK 60 V, 5.2 m惟 standard level FET


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PSMN5R5-60YS
N-channel LFPAK 60 V, 5.2 m惟 standard level FET
PSMN5R5-60YS
N-channel LFPAK 60 V, 5.2 mΩ standard level FET
Rev. 02 — 24 December 2009 Product data sheet Product profile
1.1 General description
Standard level N-channel MOSFET in LFPAK package qualified to 175 °C. This product is
designed and qualified for use in a wide range of industrial, communications and domestic
equipment.
1.2 Features and benefits Advanced TrenchMOS provides low
RDSon and low gate charge High efficiency in switching power
converters Improved mechanical and thermal
characteristics LFPAK provides maximum power
density in a Power SO8 package
1.3 Applications DC-to-DC converters Lithium-ion battery protection Load switching Motor control Server power supplies
1.4 Quick reference data Table 1. Quick reference
VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - - 60 V drain current Tmb=25 °C; see Figure 1 [1] - - 100 A
Ptot total power
dissipation
Tmb=25 °C; see Figure 2 - - 130 W junction temperature -55 - 175 °C
Avalanche ruggedness
EDS(AL)S non-repetitive
drain-source
avalanche energy
VGS =10V; Tj(init) =25°C; = 100 A; Vsup≤60V;
RGS =50 Ω; unclamped - 170 mJ
Dynamic characteristics
QGD gate-drain charge VGS =10V; ID =75A;
VDS=30 V; see Figure 14
and 15 11.2 - nC
QG(tot) total gate charge - 56 - nC
NXP Semiconductors PSMN5R5-60YS
N-channel LFPAK 60 V, 5.2 mΩ standard level FET
[1] Continuous current is limited by package. Pinning information Ordering information
Static characteristics
RDSon drain-source
on-state resistance
VGS =10V; ID =15A; = 100 °C; see Figure 12
--8.3 mΩ
VGS =10V; ID =15A; =25 °C; see Figure 13
-3.6 5.2 mΩ
Table 1. Quick reference …continued
Table 2. Pinning information source
SOT669 (LFPAK) source source gate D mounting base; connected to
drain
Table 3. Ordering information
PSMN5R5-60YS LFPAK plastic single-ended surface-mounted package (LFPAK); 4 leads SOT669
NXP Semiconductors PSMN5R5-60YS
N-channel LFPAK 60 V, 5.2 mΩ standard level FET Limiting values
[1] Continuous current is limited by package.
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - 60 V
VDGR drain-gate voltage Tj≥25 °C; Tj≤ 175 °C; RGS =20kΩ -60 V
VGS gate-source voltage -20 20 V drain current Tmb= 100 °C; see Figure 1 -74 A
Tmb =25°C; see Figure 1 [1] -100 A
IDM peak drain current tp≤10 µs; pulsed; Tmb =25°C; see Figure 3 -418 A
Ptot total power dissipation Tmb =25°C; see Figure 2 -130 W
Tstg storage temperature -55 175 °C junction temperature -55 175 °C
Tsld(M) peak soldering
temperature
-260 °C
Source-drain diode source current Tmb =25°C; [1] -100 A
ISM peak source current tp≤10 µs; pulsed; Tmb =25°C - 418 A
Avalanche ruggedness
EDS(AL)S non-repetitive
drain-source avalanche
energy
VGS =10V; Tj(init) =25°C; ID =100 A; Vsup≤60V;
RGS =50 Ω; unclamped
-170 mJ
NXP Semiconductors PSMN5R5-60YS
N-channel LFPAK 60 V, 5.2 mΩ standard level FET
NXP Semiconductors PSMN5R5-60YS
N-channel LFPAK 60 V, 5.2 mΩ standard level FET Thermal characteristics
Table 5. Thermal characteristics
Rth(j-mb) thermal resistance from junction to
mounting base
see Figure 4 - 0.5 1.1 K/W
NXP Semiconductors PSMN5R5-60YS
N-channel LFPAK 60 V, 5.2 mΩ standard level FET CharacteristicsTable 6. Characteristics
Static characteristics
V(BR)DSS drain-source
breakdown voltage =250 µA; VGS =0V; Tj =-55°C 54 - - V =250 µA; VGS =0V; Tj =25°C 60 - - V
VGS(th) gate-source threshold
voltage =1mA; VDS= VGS; Tj =25°C;
see Figure 10 and 11
234 V
VGSth ID =1mA; VDS= VGS; Tj =-55 °C;
see Figure 11
--4.6 V =1mA; VDS= VGS; Tj =175 °C;
see Figure 11
0.95 - - V
IDSS drain leakage current VDS =60V; VGS =0V; Tj=25°C - 0.05 5 µA
VDS =60V; VGS =0V; Tj= 125°C - - 100 µA
IGSS gate leakage current VGS =20V; VDS =0V; Tj=25°C - 2 100 nA
VGS =-20 V; VDS =0V; Tj=25°C - 2 100 nA
RDSon drain-source on-state
resistance
VGS =10V; ID =15A; Tj= 175 °C;
see Figure 12
-7.6 12 mΩ
VGS =10V; ID =15A; Tj= 100 °C;
see Figure 12
--8.3 mΩ
VGS =10V; ID =15A; Tj =25°C;
see Figure 13
-3.6 5.2 mΩ gate resistance f=1 MHz - 0.7 - Ω
Dynamic characteristics
QG(tot) total gate charge ID =75A; VDS =30V; VGS =10V;
see Figure 14 and 15
-56 - nC =0A; VDS =0V; VGS=10V - 47.5 - nC
QGS gate-source charge ID =75A; VDS =30V; VGS =10V;
see Figure 14 and 15 18.7 - nC
QGS(th) pre-threshold
gate-source charge =75A; VDS =30V; VGS =10V;
see Figure 14 10.3 - nC
QGS(th-pl) post-threshold
gate-source charge
-8.4 - nC
QGD gate-drain charge ID =75A; VDS =30V; VGS =10V;
see Figure 14 and 15
-11.2 - nC
VGS(pl) gate-source plateau
voltage
VDS =30V; see Figure 14 and 15 -4.9 - V
Ciss input capacitance VDS =30V; VGS=0 V; f=1 MHz; Tj =25°C;
see Figure 16 3501 - pF
Coss output capacitance - 457 - pF
Crss reverse transfer
capacitance 240 - pF
td(on) turn-on delay time VDS =30V; RL =0.4 Ω; VGS =10V;
RG(ext) =4.7Ω
-23 - ns rise time - 24 - ns
td(off) turn-off delay time - 44 - ns
NXP Semiconductors PSMN5R5-60YS
N-channel LFPAK 60 V, 5.2 mΩ standard level FET
Source-drain diode
VSD source-drain voltage IS =15A; VGS =0V; Tj=25 °C; see Figure 17 -0.8 1.2 V
trr reverse recovery time IS =25A; dIS/dt= -100 A/µs; VGS =0V;
VDS =30V
-43 - ns recovered charge - 58 - nC
Table 6. Characteristics …continued
NXP Semiconductors PSMN5R5-60YS
N-channel LFPAK 60 V, 5.2 mΩ standard level FET
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