PSMN4R3-30BL Fast Delivery |IC PHOENIX CO.,LIMITED

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PSMN4R3-30BL
N-channel 30 V 4.1 m鈩?logic level MOSFET in D2PAK
Product profile1.1 General description
Logic level N-channel MOSFET in D2PAK package qualified to 175 °C. This product is
designed and qualified for use in a wide range of industrial, communications and domestic
equipment.
1.2 Features and benefits High efficiency due to low switching
and conduction losses Suitable for logic level gate drive
sources
1.3 Applications DC-to-DC converters Load switching Motor control Server power supplies
1.4 Quick reference data
[1] Continuous current is limited by package.
PSMN4R3-30BL
N-channel 30 V 4.1 mΩ logic level MOSFET in D2PAK
Rev. 1 — 22 March 2012 Product data sheet
Table 1. Quick reference data
VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - - 30 V drain current Tmb =25°C; VGS=10 V; see Figure 1 [1] - - 100 A
Ptot total power dissipation Tmb=25 °C; see Figure 2 - - 103 W junction temperature -55 - 175 °C
Static characteristics
RDSon drain-source on-state resistance VGS =10V; ID =15 A; Tj =100 °C; see Figure 12; see Figure 13 -4.9 5.8 mΩ
VGS =10V; ID =15 A; Tj =25 °C;
see Figure 13
-3.5 4.1 mΩ
Dynamic characteristics
QGD gate-drain charge VGS= 4.5 V; ID =15A; VDS =15V;
see Figure 14; see Figure 15 -nC
QG(tot) total gate charge - 19 - nC
Avalanche ruggedness
EDS(AL)S non-repetitive drain-source
avalanche energy
VGS =10V; Tj(init) =25°C; ID= 100A;
Vsup≤30 V; RGS =50 Ω; unclamped
--74 mJ
NXP Semiconductors PSMN4R3-30BL
N-channel 30 V 4.1 mΩ logic level MOSFET in D2PAK Pinning information
[1] It is not possible to make connection to pin 2 Ordering information Marking
Table 2. Pinning information
Table 3. Ordering information
PSMN4R3-30BL D2PAK plastic single-ended surface-mounted package (D2PAK); 3 leads
(one lead cropped)
SOT404
Table 4. Marking codes
PSMN4R3-30BL PSMN4R3-30BL
NXP Semiconductors PSMN4R3-30BL
N-channel 30 V 4.1 mΩ logic level MOSFET in D2PAK Limiting values
[1] Continuous current is limited by package.
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - 30 V
VDGR drain-gate voltage Tj≥25 °C; Tj≤ 175 °C; RGS =20kΩ -30 V
VGS gate-source voltage -20 20 V drain current VGS =10V; Tmb =100 °C; see Figure 1 [1] -80 A
VGS =10V; Tmb=25 °C; see Figure 1 [1] - 100 A
IDM peak drain current pulsed; tp≤10 µs; Tmb =25°C;
see Figure 3 465 A
Ptot total power dissipation Tmb=25 °C; see Figure 2 - 103 W
Tstg storage temperature -55 175 °C junction temperature -55 175 °C
Tsld(M) peak soldering temperature - 260 °C
Source-drain diode source current Tmb =25°C [1] - 100 A
ISM peak source current pulsed; tp≤10 µs; Tmb=25°C - 465 A
Avalanche ruggedness
EDS(AL)S non-repetitive drain-source
avalanche energy
VGS =10V; Tj(init) =25°C; ID= 100A;
Vsup≤30 V; RGS =50 Ω; unclamped
-74 mJ
NXP Semiconductors PSMN4R3-30BL
N-channel 30 V 4.1 mΩ logic level MOSFET in D2PAK
NXP Semiconductors PSMN4R3-30BL
N-channel 30 V 4.1 mΩ logic level MOSFET in D2PAK Thermal characteristics
Table 6. Thermal characteristics
Rth(j-mb) thermal resistance from junction to
mounting base
see Figure 4 -1 1.5 K/W
Rth(j-a) thermal resistance from junction to
ambient
Minimum footprint; mounted on a
printed circuit board
-50 -K/W
NXP Semiconductors PSMN4R3-30BL
N-channel 30 V 4.1 mΩ logic level MOSFET in D2PAK CharacteristicsTable 7. Characteristics
Tested to JEDEC standards where applicable.
Static characteristics
V(BR)DSS drain-source breakdown voltageID= 250 µA; VGS =0V; Tj=25°C 30 --V= 250 µA; VGS =0V; Tj= -55°C 27 - - V
VGS(th) gate-source threshold voltage ID =1mA; VDS =VGS; Tj =25 °C;
see Figure 10; see Figure 11
1.3 1.7 2.15 V =1mA; VDS =VGS; Tj= 175 °C;
see Figure 11
0.5 --V =1mA; VDS =VGS; Tj =-55 °C;
see Figure 11
--2.45 V
IDSS drain leakage current VDS =30 V; VGS =0V; Tj=25°C - 0.02 1 µA
VDS =30 V; VGS =0V; Tj= 125°C --40 µA
IGSS gate leakage current VGS =16 V; VDS =0V; Tj=25°C - 10 100 nA
VGS =-16 V; VDS =0V; Tj=25°C - 10 100 nA
RDSon drain-source on-state
resistance
VGS =10 V; ID =15A; Tj= 175 °C;
see Figure 12; see Figure 13 6.65 7.8 mΩ
VGS =4.5 V; ID =15 A; Tj =25°C;
see Figure 13 4.46 5.2 mΩ
VGS =10 V; ID =15A; Tj= 100 °C;
see Figure 12; see Figure 13
-4.9 5.8 mΩ
VGS =10 V; ID =15A; Tj =25°C;
see Figure 13
-3.5 4.1 mΩ gate resistance f=1 MHz - 1 - Ω
Dynamic characteristics
QG(tot) total gate charge ID =15A; VDS =15 V; VGS =4.5V;
see Figure 14; see Figure 15
-19 -nC =15A; VDS =15 V; VGS =10V;
see Figure 14; see Figure 15 41.5 - nC =0A; VDS =0V; VGS =10V - 30 - nC
QGS gate-source charge ID =15A; VDS =15 V; VGS =4.5V;
see Figure 14; see Figure 15 -nC
QGS(th) pre-threshold gate-source
charge -nC
QGS(th-pl) post-threshold gate-source
charge -nC
QGD gate-drain charge - 5 - nC
VGS(pl) gate-source plateau voltage ID =15A; VDS =15 V; see Figure 14;
see Figure 15
-2.7 -V
Ciss input capacitance VDS =15 V; VGS=0 V; f=1 MHz; =25°C; see Figure 16 2400 - pF
Coss output capacitance - 500 - pF
Crss reverse transfer capacitance - 240 - pF
NXP Semiconductors PSMN4R3-30BL
N-channel 30 V 4.1 mΩ logic level MOSFET in D2PAK
td(on) turn-on delay time VDS =15 V; RL =0.5 Ω; VGS =10V;
RG(ext) =5.6Ω
-28 -ns rise time - 58 - ns
td(off) turn-off delay time - 44 - ns fall time - 21 - ns
Source-drain diode
VSD source-drain voltage IS =15A; VGS =0V; Tj =25°C;
see Figure 17 0.81 1.2 V
trr reverse recovery time IS =15A; dIS/dt= -100 A/µs;
VGS =0 V; VDS =15V
-35 -ns recovered charge - 30 - nC
Table 7. Characteristics …continued
Tested to JEDEC standards where applicable.
NXP Semiconductors PSMN4R3-30BL
N-channel 30 V 4.1 mΩ logic level MOSFET in D2PAK

Partno	Mfg	Dc	Qty	Available	Descript
PSMN4R3-30BL \|PSMN4R330BL	NXP/PH	N/a	10000	avai	N-channel 30 V 4.1 m鈩?logic level MOSFET in D2PAK