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PSMN3R3-80BS
N-channel 80 V, 3.5 m鈩?standard level MOSFET in D2PAK
Product profile1.1 General descriptionStandard level N-channel MOSFET in D2PAK package qualified to 175C. This product is
designed and qualified for use in a wide range of industrial, communications and domestic
equipment.
1.2 Features and benefits High efficiency due to low switching
and conduction losses Suitable for standard level gate drive
1.3 Applications DC-to-DC converters Load switch Motor control Server power supplies
1.4 Quick reference data[1] Continuous current is limited by package.
PSMN3R3-80BS
N-channel 80 V , 3.5 mΩ standard level MOSFET in D2PAK
Rev. 2 — 29 February 2012 Product data sheet
Table 1. Quick reference dataVDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - - 80 V drain current Tmb =25°C; VGS =10V; see Figure 1 [1]- - 120 A
Ptot total power dissipation Tmb =25°C; see Figure 2 - - 306 W junction temperature -55 - 175 °C
Static characteristicsRDSon drain-source on-state resistance VGS =10V; ID =25A; Tj =25°C; see Figure 13 -3 3.5 mΩ
VGS =10V; ID =25A; Tj= 100 °C; see Figure 12; see Figure 13 - 4.95 5.8 mΩ
Dynamic characteristicsQGD gate-drain charge VGS =10V; ID =75A; VDS =40V; see Figure 14;
see Figure 15
-28 - nC
QG(tot) total gate charge - 111 - nC
Avalanche ruggednessEDS(AL)S non-repetitive
drain-source
avalanche energy
VGS =10V; Tj(init) =25°C; ID =120A;
Vsup≤80 V; RGS =50 Ω; unclamped - 676 mJ
NXP Semiconductors PSMN3R3-80BS
N-channel 80 V, 3.5 mΩ standard level MOSFET in D2PAK Pinning information Ordering information Limiting values[1] Continuous current is limited by package.
Table 2. Pinning information
Table 3. Ordering informationPSMN3R3-80BS D2PAK plastic single-ended surface-mounted package (D2PAK); 3 leads
(one lead cropped)
SOT404
Table 4. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - 80 V
VDGR drain-gate voltage Tj≥25 °C; Tj≤ 175 °C; RGS =20kΩ -80 V
VGS gate-source voltage -20 20 V drain current VGS =10V; Tmb= 100 °C; see Figure 1 [1] -120 A
VGS =10V; Tmb =25°C; see Figure 1 [1] -120 A
IDM peak drain current pulsed; tp≤10 µs; Tmb =25°C;
see Figure 3
-760 A
Ptot total power dissipation Tmb =25°C; see Figure 2 -306 W
Tstg storage temperature -55 175 °C junction temperature -55 175 °C
Tsld(M) peak soldering temperature - 260 °C
Source-drain diode source current Tmb =25°C [1] -120 A
ISM peak source current pulsed; tp≤10 µs; Tmb =25°C - 760 A
Avalanche ruggednessEDS(AL)S non-repetitive drain-source
avalanche energy
VGS =10V; Tj(init) =25°C; ID= 120A;
Vsup≤80 V; RGS =50 Ω; unclamped
-676 mJ
NXP Semiconductors PSMN3R3-80BS
N-channel 80 V, 3.5 mΩ standard level MOSFET in D2PAK
NXP Semiconductors PSMN3R3-80BS
N-channel 80 V, 3.5 mΩ standard level MOSFET in D2PAK Thermal characteristics
Table 5. Thermal characteristicsRth(j-mb) thermal resistance from junction
to mounting base
see Figure 4 - 0.22 0.49 K/W
Rth(j-a) thermal resistance from junction
to ambient
minimum footprint; mounted on a
printed circuit board
-50 -K/W
NXP Semiconductors PSMN3R3-80BS
N-channel 80 V, 3.5 mΩ standard level MOSFET in D2PAK CharacteristicsTable 6. Characteristics
Static characteristicsV(BR)DSS drain-source
breakdown voltage =250 µA; VGS =0V; Tj= -55°C 73 - - V =250 µA; VGS =0V; Tj=25°C 80 --V
VGS(th) gate-source threshold
voltage =1mA; VDS =VGS; Tj= 175 °C;
see Figure 10 --V =1mA; VDS =VGS; Tj =-55 °C;
see Figure 10
--4.6 V =1mA; VDS =VGS; Tj =25°C;
see Figure 10;see Figure 11
234V
IDSS drain leakage current VDS =80V; VGS =0V; Tj=25°C - 0.02 10 µA
VDS =80V; VGS =0V; Tj= 175°C - - 500 µA
IGSS gate leakage current VGS =-20 V; VDS =0V; Tj=25°C - 10 100 nA
VGS =20V; VDS =0V; Tj=25°C - 10 100 nA
RDSon drain-source on-state
resistance
VGS =10V; ID =25A; Tj= 175 °C;
see Figure 12;see Figure 13
-7.1 8.4 mΩ
VGS =10V; ID =25A; Tj =25°C;
see Figure 13 3.5 mΩ
VGS =10V; ID =25A; Tj= 100 °C;
see Figure 12;see Figure 13 4.95 5.8 mΩ internal gate resistance
(AC)
f=1MHz - 0.9 - Ω
Dynamic characteristicsQG(tot) total gate charge ID =0A; VDS =0V; VGS=10V - 104 - nC =75A; VDS =40V; VGS =10V;
see Figure 14; see Figure 15
-111 -nC
QGS gate-source charge - 38 - nC
QGS(th) pre-threshold
gate-source charge
-24 -nC
QGS(th-pl) post-threshold
gate-source charge
-14 -nC
QGD gate-drain charge - 28 - nC
VGS(pl) gate-source plateau
voltage =75A; VDS =40V;
see Figure 14; see Figure 15
-6.1 -V
Ciss input capacitance VDS =40V; VGS=0 V; f=1 MHz; =25°C; see Figure 16 8161 - pF
Coss output capacitance - 701 - pF
Crss reverse transfer
capacitance 337 - pF
td(on) turn-on delay time VDS =40V; RL =0.53 Ω; VGS =10V;
RG(ext) =4.7 Ω; ID =75A
-38 -ns rise time - 29 - ns
td(off) turn-off delay time - 94 - ns fall time - 33 - ns
NXP Semiconductors PSMN3R3-80BS
N-channel 80 V, 3.5 mΩ standard level MOSFET in D2PAK
Source-drain diodeVSD source-drain voltage IS =25A; VGS =0V; Tj =25°C;
see Figure 17
-0.8 1.2 V
trr reverse recovery time IS =25A; dIS/dt= 100 A/µs; VGS =0V;
VDS =20V
-59 -ns recovered charge - 109 - nC
Table 6. Characteristics …continued
NXP Semiconductors PSMN3R3-80BS
N-channel 80 V, 3.5 mΩ standard level MOSFET in D2PAK
