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PSMN1R3-30YL |PSMN1R330YLNXPN/a13500avaiN-channel 30 V 1.3 m鈩?logic level MOSFET in LFPAK


PSMN1R3-30YL ,N-channel 30 V 1.3 m鈩?logic level MOSFET in LFPAKApplications„ DC-to-DC converters„ Motor control„ Lithium-ion battery protection„ Server power supp ..
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PSMN1R3-30YL
N-channel 30 V 1.3 m鈩?logic level MOSFET in LFPAK
PSMN1R3-30YL
N-channel 30 V 1.3 mΩ logic level MOSFET in LFPAK
Rev. 02 — 25 June 2009 Product data sheet Product profile
1.1 General description
Logic level N-channel MOSFET in LFPAK package qualified to 150 °C. This product is
designed and qualified for use in a wide range of industrial, communications and domestic
equipment.
1.2 Features and benefits Advanced TrenchMOS provides low
RDSon and low gate charge High efficiency gains in switching
power convertors Improved mechanical and thermal
characteristics LFPAK provides maximum power
density in a Power SO8 package
1.3 Applications DC-to-DC converters Lithium-ion battery protection Load switching Motor control Server power supplies
1.4 Quick reference data Table 1. Quick reference
VDS drain-source voltage Tj≥25 °C; Tj≤ 150°C - - 30 V drain current Tmb =25°C; VGS =10V;
see Figure 1;
[1] - - 100 A
Ptot total power
dissipation
Tmb=25 °C; see Figure 2 - - 121 W junction temperature -55 - 150 °C
Avalanche ruggedness
EDS(AL)S non-repetitive
drain-source
avalanche energy
VGS =10V; Tj(init) =25°C; = 100 A; Vsup≤30V;
RGS =50 Ω; unclamped - 383 mJ
Dynamic characteristics
QGD gate-drain charge VGS= 4.5 V; ID =25A;
VDS=12 V; see Figure 13;
see Figure 14
-9.3 -nC
QG(tot) total gate charge - 46.6 - nC
NXP Semiconductors PSMN1R3-30YL
N-channel 30 V 1.3 mΩ logic level MOSFET in LFPAK
[1] Continuous current is limited by package. Pinning information Ordering information
Static characteristics
RDSon drain-source
on-state resistance
VGS =10V; ID =15A; = 100 °C; see Figure 12
--1.8 mΩ
VGS =10V; ID =15A; =25 °C; see Figure 17 1.04 1.3 mΩ
Table 1. Quick reference …continued
Table 2. Pinning information source
SOT1023
(LFPAK2) source source gate D mounting base; connected to
drain2 14
Table 3. Ordering information
PSMN1R3-30YL LFPAK2 Plastic single-ende surface-mounted package (LFPAK2); 4 leads SOT1023
NXP Semiconductors PSMN1R3-30YL
N-channel 30 V 1.3 mΩ logic level MOSFET in LFPAK Limiting values
[1] Continuous current is limited by package.
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage Tj≥25 °C; Tj≤ 150°C - 30 V
VDGR drain-gate voltage Tj≥25 °C; Tj≤ 150 °C; RGS =20kΩ -30 V
VGS gate-source voltage -20 20 V drain current VGS =10V; Tmb= 100 °C; see Figure 1 [1] -100 A
VGS =10V; Tmb =25°C; see Figure 1 [1] -100 A
IDM peak drain current tp≤10 µs; pulsed; Tmb =25°C; see Figure 3 -923 A
Ptot total power dissipation Tmb =25°C; see Figure 2 -121 W
Tstg storage temperature -55 150 °C junction temperature -55 150 °C
Tsld(M) peak soldering
temperature
-260 °C
Source-drain diode source current Tmb =25°C; [1] -100 A
ISM peak source current tp≤10 µs; pulsed; Tmb =25°C - 923 A
Avalanche ruggedness
EDS(AL)S non-repetitive
drain-source avalanche
energy
VGS =10V; Tj(init) =25°C; ID =100 A; Vsup≤30V;
RGS =50 Ω; unclamped
-383 mJ
NXP Semiconductors PSMN1R3-30YL
N-channel 30 V 1.3 mΩ logic level MOSFET in LFPAK
NXP Semiconductors PSMN1R3-30YL
N-channel 30 V 1.3 mΩ logic level MOSFET in LFPAK Thermal characteristics
Table 5. Thermal characteristics
Rth(j-mb) thermal resistance from junction to
mounting base
see Figure 4 - 0.4 1.03 K/W
NXP Semiconductors PSMN1R3-30YL
N-channel 30 V 1.3 mΩ logic level MOSFET in LFPAK CharacteristicsTable 6. Characteristics
Static characteristics
V(BR)DSS drain-source
breakdown voltage =250 µA; VGS =0V; Tj =25°C 30 - - V =250 µA; VGS =0V; Tj =-55°C 27 - - V
VGS(th) gate-source threshold
voltage =1mA; VDS = VGS; Tj =25°C;
see Figure 10; see Figure 11
1.3 1.7 2.15 V =1mA; VDS = VGS; Tj= 150 °C;
see Figure 10
0.65 - - V =1mA; VDS = VGS; Tj =-55 °C;
see Figure 10
--2.45 V
IDSS drain leakage current VDS =30V; VGS =0V; Tj=25°C --1 µA
VDS =30V; VGS =0V; Tj= 150°C - - 100 µA
IGSS gate leakage current VGS =15V; VDS =0V; Tj=25°C - - 100 nA
VGS =-15 V; VDS =0V; Tj=25°C - - 100 nA
RDSon drain-source on-state
resistance
VGS =4.5 V; ID =15A; Tj =25°C;
see Figure 17 1.43 1.95 mΩ
VGS =10V; ID =15A; Tj= 100 °C;
see Figure 12
--1.8 mΩ
VGS =10V; ID =15A; Tj= 150 °C;
see Figure 12
-1.9 2.8 mΩ
VGS =10V; ID =15A; Tj =25°C;
see Figure 17 1.04 1.3 mΩ gate resistance f=1 MHz - 0.89 - Ω
Dynamic characteristics
QG(tot) total gate charge ID =25A; VDS =12V; VGS =10V;
see Figure 13; see Figure 14 100 - nC =0A; VDS =0V; VGS =10V - 90 - nC =25A; VDS =12V; VGS =4.5V;
see Figure 13; see Figure 14 46.6 - nC
QGS gate-source charge ID =25A; VDS =12V; VGS =4.5V;
see Figure 13; see Figure 14 17.9 - nC
QGS(th) pre-threshold
gate-source charge =25A; VDS =12V; VGS =4.5V;
see Figure 13
-11 - nC
QGS(th-pl) post-threshold
gate-source charge
-6.9 - nC
QGD gate-drain charge ID =25A; VDS =12V; VGS =4.5V;
see Figure 13; see Figure 14
-9.3 - nC
VGS(pl) gate-source plateau
voltage
VDS =12V; see Figure 13; see Figure 14 -2.53 - V
Ciss input capacitance VDS =12V; VGS=0 V; f=1 MHz; =25°C; see Figure 15 6227 - pF
Coss output capacitance - 1415 - pF
Crss reverse transfer 619 - pF
NXP Semiconductors PSMN1R3-30YL
N-channel 30 V 1.3 mΩ logic level MOSFET in LFPAK
td(on) turn-on delay time VDS =12V; RL =0.5 Ω; VGS =4.5V;
RG(ext) =5.6Ω
-64 - ns rise time - 108 - ns
td(off) turn-off delay time - 106 - ns fall time - 52 - ns
Source-drain diode
VSD source-drain voltage IS =25A; VGS =0V; Tj =25°C;
see Figure 16 0.88 1.2 V
trr reverse recovery time IS =20A; dIS/dt= -100 A/s; VGS =0V;
VDS =20V
-46 - ns recovered charge - 53 - nC
Table 6. Characteristics …continued
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