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PSMN1R1-40BS |PSMN1R140BSNXP/PHN/a10000avaiN-channel 40 V 1.3 m鈩?standard level MOSFET in D2PAK


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PSMN1R1-40BS
N-channel 40 V 1.3 m鈩?standard level MOSFET in D2PAK
Product profile1.1 General description
Standard level N-channel MOSFET in D2PAK (SOT404) package qualified to 175 °C. This
product is designed and qualified for use in a wide range of industrial, communications
and domestic equipment.
1.2 Features and benefits High efficiency due to low switching
and conduction losses Suitable for standard level gate drive
sources
1.3 Applications DC-to-DC convertors Load switching Motor control Server power supplies
1.4 Quick reference data
[1] Continuous current is limited by package
PSMN1R1-40BS
N-channel 40 V 1.3 mΩ standard level MOSFET in D2PAK
Rev. 2 — 29 February 2012 Product data sheet
Table 1. Quick reference data
VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C --40 V drain current Tmb =25°C; VGS =10V; see Figure 1 [1]- - 120 A
Ptot total power dissipation Tmb =25°C; see Figure 2 - - 306 W junction temperature -55 - 175 °C
Static characteristics
RDSon drain-source on-state resistance VGS =10V; ID =25A; Tj= 100 °C;see Figure 12;see Figure 13 -1.68 2 mΩ
VGS =10V; ID =25A; Tj =25°C;
see Figure 13 1.16 1.3 mΩ
Dynamic characteristics
QGD gate-drain charge VGS =10V; ID =75A; VDS =20V;
see Figure 14;see Figure 15
-32 -nC
QG(tot) total gate charge - 136 - nC
Avalanche ruggedness
EDS(AL)S non-repetitive
drain-source
avalanche energy
VGS =10V; Tj(init) =25°C; ID =120A;
Vsup≤40 V; unclamped; RGS =50Ω; tp =0.1ms
--1.4 J
NXP Semiconductors PSMN1R1-40BS
N-channel 40 V 1.3 mΩ standard level MOSFET in D2PAK Pinning information
[1] It is not possible to make connection to pin 2. Ordering information Limiting values
[1] Continuous current is limited by package.
Table 2. Pinning information
Table 3. Ordering information
PSMN1R1-40BS D2PAK plastic single-ended surface-mounted package (D2PAK); 3 leads
(one lead cropped)
SOT404
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - 40 V
VDGR drain-gate voltage Tj≥25 °C; Tj≤ 175 °C; RGS =20kΩ -40 V
VGS gate-source voltage -20 20 V drain current VGS =10V; Tmb =100°C [1]- 120 A
VGS =10V; Tmb =25°C; see Figure 1 [1]- 120 A
IDM peak drain current pulsed; tp≤10 µs; Tmb =25°C; see Figure 3 - 1320A
Ptot total power dissipation Tmb =25°C; see Figure 2 - 306 W
Tstg storage temperature -55 175 °C junction temperature -55 175 °C
Tsld(M) peak soldering temperature - 260 °C
Source-drain diode source current Tmb =25°C [1]- 120 A
ISM peak source current pulsed; tp≤10 µs; Tmb=25°C - 1320A
Avalanche ruggedness
EDS(AL)S non-repetitive drain-source
avalanche energy
VGS =10V; Tj(init) =25°C; ID =120 A; Vsup≤40V;
unclamped; RGS =50 Ω; tp =0.1ms
-1.4 J
NXP Semiconductors PSMN1R1-40BS
N-channel 40 V 1.3 mΩ standard level MOSFET in D2PAK
NXP Semiconductors PSMN1R1-40BS
N-channel 40 V 1.3 mΩ standard level MOSFET in D2PAK Thermal characteristics
Table 5. Thermal characteristics
Rth(j-mb) thermal resistance from
junction to mounting base
see Figure 4 - 0.22 0.49 K/W
Rth(j-a) thermal resistance from
junction to ambient
minimum footprint; mounted on
a printed-circuit board
-50 -K/W
NXP Semiconductors PSMN1R1-40BS
N-channel 40 V 1.3 mΩ standard level MOSFET in D2PAK CharacteristicsTable 6. Characteristics
Static characteristics
V(BR)DSS drain-source
breakdown voltage =250 µA; VGS =0V; Tj= -55°C 36 - - V =250 µA; VGS =0V; Tj=25°C 40 --V
VGS(th) gate-source threshold
voltage =1mA; VDS =VGS; Tj =-55 °C;
see Figure 10
--4.6 V =1mA; VDS =VGS; Tj= 175 °C;
see Figure 10 --V =1mA; VDS =VGS; Tj =25°C;
see Figure 11;see Figure 10
234V
IDSS drain leakage current VDS =40V; VGS =0V; Tj=25°C - 0.02 10 µA
VDS =40V; VGS =0V; Tj= 175°C - - 500 µA
IGSS gate leakage current VGS =20V; VDS =0V; Tj=25°C - 10 100 nA
VGS =-20 V; VDS =0V; Tj=25°C - 10 100 nA
RDSon drain-source on-state
resistance
VGS =10V; ID =25A; Tj= 100 °C;
see Figure 12;see Figure 13
-1.68 2 mΩ
VGS =10V; ID =25A; Tj= 175 °C;
see Figure 12;see Figure 13
-2.3 2.8 mΩ
VGS =10V; ID =25A; Tj =25°C;
see Figure 13 1.16 1.3 mΩ internal gate resistance
(AC)
f=1MHz - 1.1 - Ω
Dynamic characteristics
QG(tot) total gate charge ID =0A; VDS =0V; VGS=10V - 133 - nC =75A; VDS =20V; VGS =10V;
see Figure 14;see Figure 15 136 - nC
QGS gate-source charge - 52 - nC
QGS(th) pre-threshold
gate-source charge
-30 -nC
QGS(th-pl) post-threshold
gate-source charge
-22 -nC
QGD gate-drain charge - 32 - nC
VGS(pl) gate-source plateau
voltage =75A; VDS=20 V;see Figure 14;
see Figure 15
-6.1 -V
Ciss input capacitance VDS =20V; VGS=0 V; f=1 MHz; =25 °C;see Figure 16 9710 - pF
Coss output capacitance - 2042 - pF
Crss reverse transfer
capacitance 994 - pF
td(on) turn-on delay time VDS =20V; RL =0.8 Ω; VGS =5V;
RG(ext) =4.7Ω
-45 -ns rise time - 66 - ns
td(off) turn-off delay time - 111 - ns fall time - 53 - ns
NXP Semiconductors PSMN1R1-40BS
N-channel 40 V 1.3 mΩ standard level MOSFET in D2PAK
Source-drain diode
VSD source-drain voltage IS =25A; VGS =0V; Tj =25°C;
see Figure 17
-0.8 1.2 V
trr reverse recovery time IS =25A; dIS/dt= -100 A/µs; VGS =0V;
VDS =20V
-64 -ns recovered charge - 117 - nC
Table 6. Characteristics …continued
NXP Semiconductors PSMN1R1-40BS
N-channel 40 V 1.3 mΩ standard level MOSFET in D2PAK
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