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PSMN022-30BL |PSMN02230BLNXP/PHN/a10000avaiN-channel 30 V 22.6 m鈩?logic level MOSFET in D2PAK


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PSMN022-30BL
N-channel 30 V 22.6 m鈩?logic level MOSFET in D2PAK
Product profile1.1 General description
Logic level N-channel MOSFET in D2PAK package qualified to 175 °C. This product is
designed and qualified for use in a wide range of industrial, communications and domestic
equipment.
1.2 Features and benefits High efficiency due to low switching
and conduction losses Suitable for logic level gate drive
sources
1.3 Applications DC-to-DC converters Load switiching Motor control Server power supplies
1.4 Quick reference data
PSMN022-30BL
N-channel 30 V 22.6 mΩ logic level MOSFET in D2PAK
Rev. 1 — 21 March 2012 Product data sheet
Table 1. Quick reference data
VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C --30 V drain current Tmb =25°C; VGS =10V; see Figure 1 --30 A
Ptot total power dissipation Tmb =25°C; see Figure 2 --41 W junction temperature -55 - 175 °C
Static characteristics
RDSon drain-source on-state resistance VGS =10V; ID =5A; Tj= 100 °C;see Figure 13 - 26.84 31.6 mΩ
VGS =10V; ID =5A; Tj =25 °C;
see Figure 12 19.17 22.6 mΩ
Dynamic characteristics
QGD gate-drain charge VGS =4.5 V; ID =5A; VDS =15V;
see Figure 14; see Figure 15
-1.4 -nC
QG(tot) total gate charge - 4.4 - nC
Avalanche ruggedness
EDS(AL)S non-repetitive
drain-source
avalanche energy
VGS =10V; Tj(init) =25°C; ID =30A;
Vsup≤30 V; RGS =50 Ω; unclamped
--7 mJ
NXP Semiconductors PSMN022-30BL
N-channel 30 V 22.6 mΩ logic level MOSFET in D2PAK Pinning information
[1] It is not possible to make connection to pin 2. Ordering information Marking
Table 2. Pinning information
Table 3. Ordering information
PSMN022-30BL D2PAK plastic single-ended surface-mounted package (D2PAK);
3 leads (one lead cropped)
SOT404
Table 4. Marking codes
PSMN022-30BL PSMN022-30BL
NXP Semiconductors PSMN022-30BL
N-channel 30 V 22.6 mΩ logic level MOSFET in D2PAK Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - 30 V
VDGR drain-gate voltage Tj≥25 °C; Tj≤ 175 °C; RGS =20kΩ -30 V
VGS gate-source voltage -20 20 V drain current VGS =10V; Tmb= 100 °C; see Figure 1 -22 A
VGS =10V; Tmb =25°C; see Figure 1 -30 A
IDM peak drain current pulsed; tp≤10 µs; Tmb =25°C;
see Figure 3 125 A
Ptot total power dissipation Tmb =25°C; see Figure 2 -41 W
Tstg storage temperature -55 175 °C junction temperature -55 175 °C
Tsld(M) peak soldering temperature - 260 °C
Source-drain diode source current Tmb =25°C - 30 A
ISM peak source current pulsed; tp≤10 µs; Tmb=25°C - 125 A
Avalanche ruggedness
EDS(AL)S non-repetitive drain-source
avalanche energy
VGS =10V; Tj(init) =25°C; ID =30A;
Vsup≤30 V; RGS =50 Ω; unclamped mJ
NXP Semiconductors PSMN022-30BL
N-channel 30 V 22.6 mΩ logic level MOSFET in D2PAK Thermal characteristics
Table 6. Thermal characteristics
Rth(j-mb) thermal resistance from junction to
mounting base
see Figure 4 -3.1 3.6 K/W
Rth(j-a) thermal resistance from junction to
ambient
minimum footprint; mounted on a
printed circuit board
-50 -K/W
NXP Semiconductors PSMN022-30BL
N-channel 30 V 22.6 mΩ logic level MOSFET in D2PAK CharacteristicsTable 7. Characteristics
Static characteristics
V(BR)DSS drain-source
breakdown voltage =250 µA; VGS =0V; Tj=25°C 30 --V =250 µA; VGS =0V; Tj= -55°C 27 - - V
VGS(th) gate-source threshold
voltage =1mA; VDS =VGS; Tj =25°C;
see Figure 10; see Figure 11
1.3 1.7 2.15 V =1mA; VDS =VGS; Tj= 175 °C;
see Figure 11
0.5 --V =1mA; VDS =VGS; Tj =-55 °C;
see Figure 11
--2.45 V
IDSS drain leakage current VDS =30V; VGS =0V; Tj=25°C - 0.3 1 µA
VDS =30V; VGS =0V; Tj= 125°C --50 µA
IGSS gate leakage current VGS =16V; VDS =0V; Tj=25°C - 10 100 nA
VGS =-16 V; VDS =0V; Tj=25°C - 10 100 nA
RDSon drain-source on-state
resistance
VGS =4.5 V; ID =5A; Tj =25°C;
see Figure 12 25.17 29.6 mΩ
VGS =10V; ID =5A; Tj= 175 °C;
see Figure 13; see Figure 12 50.99 60 mΩ
VGS =10V; ID =5A; Tj= 100 °C;
see Figure 13 26.84 31.6 mΩ
VGS =10V; ID =5A; Tj =25 °C;
see Figure 12 19.17 22.6 mΩ gate resistance f=1 MHz - 2 - Ω
Dynamic characteristics
QG(tot) total gate charge ID =5A; VDS =15V; VGS =10V;
see Figure 14; see Figure 15 -nC =0A; VDS =0V; VGS=10V -8 -nC =5A; VDS =15V; VGS =4.5V;
see Figure 14; see Figure 15
-4.4 -nC
QGS gate-source charge - 1.6 - nC
QGS(th) pre-threshold
gate-source charge
-0.8 -nC
QGS(th-pl) post-threshold
gate-source charge
-0.8 -nC
QGD gate-drain charge - 1.4 - nC
VGS(pl) gate-source plateau
voltage =5A; VDS =15V;
see Figure 14; see Figure 15 -V
Ciss input capacitance VDS =15V; VGS=0 V; f=1 MHz; =25°C; see Figure 16 447 - pF
Coss output capacitance - 96 - pF
Crss reverse transfer
capacitance
-61 -pF
NXP Semiconductors PSMN022-30BL
N-channel 30 V 22.6 mΩ logic level MOSFET in D2PAK
td(on) turn-on delay time VDS =15V; RL =1.5 Ω; VGS =4.5V;
RG(ext) =4.7Ω
-12 -ns rise time - 29 - ns
td(off) turn-off delay time - 17 - ns fall time -7 -ns
Source-drain diode
VSD source-drain voltage IS =5A; VGS =0V; Tj =25°C;
see Figure 17
-0.7 1.2 V
trr reverse recovery time IS =5A; dIS/dt= -100 A/µs; VGS =0V;
VDS =15V
-22 -ns recovered charge - 10 - nC
Table 7. Characteristics …continued
NXP Semiconductors PSMN022-30BL
N-channel 30 V 22.6 mΩ logic level MOSFET in D2PAK
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