PSMN015-100B ,N-channel TrenchMOS SiliconMAX standard level FETGeneral descriptionSiliconMAX standard level N-channel enhancement mode Field-Effect Transistor (FE ..
PSMN015-100B ,N-channel TrenchMOS SiliconMAX standard level FET
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PSMN015-100B
N-channel TrenchMOS SiliconMAX standard level FET
PSMN015-100B
N-channel TrenchMOS SiliconMAX standard level FET
Rev. 06 — 17 December 2009 Product data sheet Product profile
1.1 General descriptionSiliconMAX standard level N-channel enhancement mode Field-Effect Transistor (FET) in
a plastic package using TrenchMOS technology. This product is designed and qualified for
use in computing, communications, consumer and industrial applications only.
1.2 Features and benefits Low conduction losses due to low
on-state resistance Rated for avalanche ruggedness
1.3 Applications DC-to-DC convertors Switched-mode power supplies
1.4 Quick reference data Table 1. Quick referenceVDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - - 100 V drain current Tmb =25°C; VGS =10V;
see Figure 1 and 3
--75 A
Ptot total power
dissipation
Tmb=25 °C; see Figure 2 - - 300 W
Dynamic characteristicsQGD gate-drain charge VGS =10V; ID =75A;
VDS =80V; Tj =25°C;
see Figure 11
-35 - nC
Static characteristicsRDSon drain-source
on-state resistance
VGS =10V; ID =25A; =25°C;
see Figure 9 and 10 1215mΩ
NXP Semiconductors PSMN015-100B
N-channel TrenchMOS SiliconMAX standard level FET Pinning information[1] It is not possible to make a connection to pin 2.
Ordering information Limiting values
Table 2. Pinning information gate
SOT404 (D2PAK) drain [1] source D mounting base; connected to
drain
Table 3. Ordering informationPSMN015-100B D2PAK plastic single-ended surface-mounted package (D2PAK); 3 leads (one
lead cropped)
SOT404
Table 4. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - 100 V
VDGR drain-gate voltage Tj≤ 175 °C; Tj≥25 °C; RGS =20kΩ -100 V
VGS gate-source voltage -20 20 V drain current VGS =10V; Tmb= 100 °C; see Figure 1 -60.8 A
VGS =10V; Tmb =25°C; see Figure 1 and 3 -75 A
IDM peak drain current tp≤10 µs; pulsed; Tmb =25°C; see Figure 3 -240 A
Ptot total power dissipation Tmb =25°C; see Figure 2 -300 W
Tstg storage temperature -55 175 °C junction temperature -55 175 °C
Source-drain diode source current Tmb =25°C - 75 A
ISM peak source current tp≤10 µs; pulsed; Tmb =25°C - 240 A
Avalanche ruggednessEDS(AL)S non-repetitive
drain-source avalanche
energy
VGS =10V; Tj(init) =25°C; ID =36A; Vsup≤50V;
unclamped; tp= 0.11 ms; RGS =50Ω
-320 mJ
NXP Semiconductors PSMN015-100B
N-channel TrenchMOS SiliconMAX standard level FET
NXP Semiconductors PSMN015-100B
N-channel TrenchMOS SiliconMAX standard level FET Thermal characteristics
Table 5. Thermal characteristicsRth(j-mb) thermal resistance from
junction to mounting
base
see Figure 4 --0.5 K/W
Rth(j-a) thermal resistance from
junction to ambient
mounted on a printed-circuit board;
minimum footprint; vertical in still air
-50 - K/W
NXP Semiconductors PSMN015-100B
N-channel TrenchMOS SiliconMAX standard level FET CharacteristicsTable 6. Characteristics
Static characteristicsV(BR)DSS drain-source
breakdown voltage =250 µA; VGS =0V; Tj =-55°C 89 - - V =250 µA; VGS =0V; Tj =25°C 100 - - V
VGS(th) gate-source threshold
voltage =1mA; VDS= VGS; Tj =175 °C;
see Figure 8 - V =1mA; VDS= VGS; Tj =-55 °C;
see Figure 8
--4.4 V =1mA; VDS= VGS; Tj =25°C;
see Figure 8
234 V
IDSS drain leakage current VDS =100 V; VGS =0V; Tj=25°C - 0.05 10 µA
VDS =100 V; VGS =0V; Tj= 175°C - - 500 µA
IGSS gate leakage current VGS =20V; VDS =0V; Tj=25°C - 2 100 nA
VGS =-20 V; VDS =0V; Tj=25°C - 2 100 nA
RDSon drain-source on-state
resistance
VGS =10V; ID =25A; Tj= 175 °C;
see Figure 9 and 10 32.4 40.5 mΩ
VGS =10V; ID =25A; Tj =25°C;
see Figure 9 and 10
-12 15 mΩ
Dynamic characteristicsQG(tot) total gate charge ID =75A; VDS =80V; VGS =10V; =25°C; see Figure 11
-90 - nC
QGS gate-source charge - 20 - nC
QGD gate-drain charge - 35 - nC
Ciss input capacitance VDS =25V; VGS=0 V; f=1 MHz; =25°C; see Figure 12 4900 - pF
Coss output capacitance - 390 - pF
Crss reverse transfer
capacitance 220 - pF
td(on) turn-on delay time VDS =50V; RL =1.8 Ω; VGS =10V;
RG(ext) =5.6 Ω; Tj =25°C
-25 - ns rise time - 65 - ns
td(off) turn-off delay time - 95 - ns fall time - 50 - ns
Source-drain diodeVSD source-drain voltage IS =25A; VGS =0V; Tj =25°C;
see Figure 13
-0.8 1.1 V
trr reverse recovery time IS =20A; dIS/dt= -100 A/µs; VGS =0V;
VDS =25V; Tj =25°C
-80 - ns recovered charge - 115 - nC
NXP Semiconductors PSMN015-100B
N-channel TrenchMOS SiliconMAX standard level FET