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PSMN009-100B
N-channel TrenchMOS SiliconMAX standard level FET
PSMN009-100B
N-channel TrenchMOS SiliconMAX standard level FET
Rev. 02 — 6 July 2009 Product data sheet Product profile
1.1 General descriptionSiliconMAX standard level N-channel enhancement mode Field-Effect Transistor (FET) in
a plastic package using TrenchMOS technology. This product is designed and qualified for
use in computing, communications, consumer and industrial applications only.
1.2 Features and benefits Low conduction losses due to low
on-state resistance Suitable for high frequency
applications due to fast switching
characteristics
1.3 Applications High frequency computer motherboard
DC-to-DC convertors OR-ing applicationss
1.4 Quick reference data Table 1. Quick referenceVDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - - 100 V drain current Tmb =25°C; VGS =10V;
see Figure 1; see Figure 3
--75 A
Ptot total power
dissipation
Tmb=25 °C; see Figure 2 - - 230 W
Dynamic characteristicsQGD gate-drain charge VGS =10V; ID =75A;
VDS =80V; Tj =25°C;
see Figure 11
-44 - nC
Static characteristicsRDSon drain-source
on-state resistance
VGS =10V; ID =25A; =25 °C; see Figure 9;
see Figure 10
-7.5 8.8 mΩ
NXP Semiconductors PSMN009-100B
N-channel TrenchMOS SiliconMAX standard level FET Pinning information[1] It is not possible to make connection to pin 2.
Ordering information
Table 2. Pinning information gate
SOT404
(D2PAK) drain [1] source D mounting base; connected to
drain
Table 3. Ordering informationPSMN009-100B D2PAK plastic single-ended surface-mounted package (D2PAK); 3 leads (one
lead cropped)
SOT404
NXP Semiconductors PSMN009-100B
N-channel TrenchMOS SiliconMAX standard level FET Limiting values
Table 4. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - 100 V
VDGR drain-gate voltage Tj≤ 175 °C; Tj≥25 °C; RGS =20kΩ -100 V
VGS gate-source voltage -20 20 V drain current VGS =10V; Tmb= 100 °C; see Figure 1 -65 A
VGS =10V; Tmb =25°C; see Figure 1; see Figure 3 -75 A
IDM peak drain current tp≤10 µs; pulsed; Tmb =25°C; see Figure 3 -400 A
Ptot total power dissipation Tmb =25°C; see Figure 2 -230 W
Tstg storage temperature -55 175 °C junction temperature -55 175 °C
VGSM peak gate-source
voltage
pulsed; tp≤50 µs; Tj≤ 150 °C; δ =25% -30 30 V
Source-drain diode source current Tmb =25°C - 75 A
ISM peak source current tp≤10 µs; pulsed; Tmb =25°C - 400 A
Avalanche ruggednessEDS(AL)S non-repetitive
drain-source avalanche
energy
VGS =10V; Tj(init) =25°C; ID =35A; Vsup =15V;
unclamped; tp =0.1 ms; RGS =50Ω
-120 mJ
IDS(AL)S non-repetitive
drain-source avalanche
current
VGS =10V; Vsup =15V; RGS =50 Ω; Tj(init) =25°C;
unclamped
-75 A
NXP Semiconductors PSMN009-100B
N-channel TrenchMOS SiliconMAX standard level FET
NXP Semiconductors PSMN009-100B
N-channel TrenchMOS SiliconMAX standard level FET Thermal characteristics
Table 5. Thermal characteristicsRth(j-mb) thermal resistance from junction
to mounting base
see Figure 4 - - 0.65 K/W
Rth(j-a) thermal resistance from junction
to ambient
minimum footprint; mounted on
a printed-circuit board
-50 - K/W
NXP Semiconductors PSMN009-100B
N-channel TrenchMOS SiliconMAX standard level FET CharacteristicsTable 6. Characteristics
Static characteristicsV(BR)DSS drain-source
breakdown voltage =0.25mA; VGS =0V; Tj =-55°C 90 - - V =0.25mA; VGS =0V; Tj =25°C 100 - - V
VGS(th) gate-source threshold
voltage =1mA; VDS = VGS; Tj= 175 °C;
see Figure 8 - V =1mA; VDS = VGS; Tj =25°C;
see Figure 8
234 V =1mA; VDS = VGS; Tj =-55 °C;
see Figure 8
--4.4 V
IDSS drain leakage current VDS =30V; VGS =0V; Tj= 175°C - - 500 µA
VDS =30V; VGS =0V; Tj=25°C - 0.02 1 µA
IGSS gate leakage current VGS =20V; VDS =0V; Tj=25°C - 10 100 nA
VGS =-20 V; VDS =0V; Tj=25°C - 10 100 nA
RDSon drain-source on-state
resistance
VGS =10V; ID =25A; Tj= 175 °C;
see Figure 9; see Figure 10 20.25 23.8 mΩ
VGS =10V; ID =25A; Tj =25°C;
see Figure 9; see Figure 10
-7.5 8.8 mΩ
Dynamic characteristicsQG(tot) total gate charge ID =75A; VDS =80V; VGS =10V; =25°C; see Figure 11 156 - nC
QGS gate-source charge - 31 - nC
QGD gate-drain charge - 44 - nC
Ciss input capacitance VDS =25V; VGS=0 V; f=1 MHz; =25°C; see Figure 12 8250 - pF
Coss output capacitance - 620 - pF
Crss reverse transfer
capacitance 300 - pF
td(on) turn-on delay time VDS =15V; RL =1.25 Ω; VGS =10V;
RG(ext) =6 Ω; Tj =25 °C; ID =12A
-38 - ns rise time - 59 - ns
td(off) turn-off delay time - 120 - ns fall time - 43 - ns
Source-drain diodeVSD source-drain voltage IS =25A; VGS =0V; Tj =25°C;
see Figure 13
-0.8 1.2 V
NXP Semiconductors PSMN009-100B
N-channel TrenchMOS SiliconMAX standard level FET
