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PMN49EN
N-channel TrenchMOS logic level FET
Product profile1.1 General descriptionLogic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology.
1.2 Features
1.3 Applications
1.4 Quick reference data Pinning information
PMN49EN
N-channel TrenchMOS logic level FET
Rev. 01 — 13 April 2007 Product data sheet Logic level threshold n Fast switching Battery management n High-speed switching VDS≤30V n ID≤ 4.6A RDSon≤47 mΩ n QGD= 1.6 nC (typ)
Table 1. Pinning1, 2, 5, 6 drain (D)
SOT457 (TSOP6) gate (G) source (S)
mbb076
NXP Semiconductors PMN49EN
N-channel TrenchMOS logic level FET Ordering information Limiting values
Table 2. Ordering informationPMN49EN SC-74 plastic surface-mounted package (TSOP6); 6 leads SOT457
Table 3. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage 25°C≤Tj≤ 150°C - 30 V
VDGR drain-gate voltage (DC) 25°C≤Tj≤ 150 °C; RGS =20kΩ -30 V
VGS gate-source voltage - ±20 V drain current Tsp =25 °C; VGS=10 V; see Figure2 and3 - 4.6 A
Tsp= 100 °C; VGS=10 V; see Figure2 - 2.9 A
IDM peak drain current Tsp =25 °C; pulsed; tp≤10 μs; see Figure3 - 18.4 A
Ptot total power dissipation Tsp =25 °C; see Figure1 - 1.75 W
Tstg storage temperature −55 +150 °C junction temperature −55 +150 °C
Source-drain diode source current Tsp =25°C - 1.4 A
ISM peak source current Tsp =25 °C; pulsed; tp≤10μs - 5.6 A
NXP Semiconductors PMN49EN
N-channel TrenchMOS logic level FET
NXP Semiconductors PMN49EN
N-channel TrenchMOS logic level FET Thermal characteristics
Table 4. Thermal characteristicsRth(j-sp) thermal resistance from junction to solder point see Figure4 --70 K/W
NXP Semiconductors PMN49EN
N-channel TrenchMOS logic level FET Characteristics
Table 5. Characteristics =25 °C unless otherwise specified.
Static characteristicsV(BR)DSS drain-source breakdown
voltage= 250 μA; VGS =0V =25°C 30 --V= −55°C 27 --V
VGS(th) gate-source threshold voltage ID=1 mA; VDS =VGS; see Figure 9 and10 =25°C 1 1.5 2 V= 150°C 0.6 - - V= −55°C - - 2.2 V
IDSS drain leakage current VDS =30V; VGS =0V =25°C --1 μA= 150°C - - 100 μA
IGSS gate leakage current VGS= ±20 V; VDS=0V - 10 100 nA gate resistance f=1 MHz; VGSS(AC)= 150 mV - 1.9 - Ω
RDSon drain-source on-state
resistance
VGS=10 V; ID=2 A; see Figure6 and8 =25°C - 40 47 mΩ= 150°C - 68 80 mΩ
VGS= 4.5 V; ID= 1.5 A; see Figure6 and8 - 4960mΩ
Dynamic characteristicsQG(tot) total gate charge ID=3 A; VDS=15 V; VGS= 4.5V;
see Figure11 and12 8.8 - nC
QGS gate-source charge - 1.1 - nC
QGD gate-drain charge - 1.6 - nC
VGS(pl) gate-source plateau voltage - 2.83 - V
Ciss input capacitance VGS =0V; VDS=30 V; f=1 MHz;
see Figure14 350 - pF
Coss output capacitance - 100 - pF
Crss reverse transfer capacitance - 64.1 - pF
Ciss input capacitance VGS =0V; VDS=0 V; f=1 MHz - 570 - pF
td(on) turn-on delay time VDS =15V; RL =15 Ω; VGS =10V; RG =6Ω - 4.1 - ns rise time - 4.3 - ns
td(off) turn-off delay time - 12.9 - ns fall time - 4.9 - ns
Source-drain diodeVSD source-drain voltage IS= 1.5 A; VGS=0 V; see Figure13 - 0.79 1.2 V
trr reverse recovery time IS=2 A; dIS/dt= −100 A/μs; VGS=0V - 19.25- ns recovered charge - 0.73 - nC
NXP Semiconductors PMN49EN
N-channel TrenchMOS logic level FET
