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PMN40LN
N-channel TrenchMOS logic level FET
PMN40LN renchMOS™ logic level FET
Rev. 01 — 13 November 2002 Product dataM3D302
DescriptionN-channel logic level field-effect power transistor in a plastic package using
TrenchMOS™ technology.
Product availability:
PMN40LN in SOT457 (TSOP6).
Features TrenchMOS™ technology Logic level compatible Surface mount package.
Applications Battery management High speed switch Low power DC to DC converter.
Pinning information
Table 1: Pinning - SOT457 (TSOP6), simplified outline and symbol1,2,5,6 drain (d)
SOT457 (TSOP6) gate (g) source (s)
MBK092Top view
MBB076
Philips Semiconductors PMN40LN
TrenchMOS™ logic level FET Quick reference data Limiting values
Table 2: Quick reference dataVDS drain-source voltage (DC) 25°C≤Tj≤ 150°C - 30 V drain current (DC) Tsp =25 °C; VGS =10V - 5.4 A
Ptot total power dissipation Tsp =25°C - 1.75 W junction temperature - 150 °C
RDSon drain-source on-state resistance VGS=10 V; ID= 2.5 A; Tj =25°C 3238mΩ
VGS= 4.5 V; ID=2 A; Tj =25°C 4045mΩ
Table 3: Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage (DC) 25°C≤Tj≤ 150°C - 30 V
VDGR drain-gate voltage (DC) 25°C≤Tj≤ 150 °C; RGS =20kΩ -30 V
VGS gate-source voltage (DC) - ±15 V drain current (DC) Tsp =25 °C; VGS =10V; Figure 2 and3 - 5.4 A
Tsp =70 °C; VGS =10V; Figure2 -4 A
IDM peak drain current Tsp =25 °C; pulsed; tp≤10 μs; Figure3 - 21.6 A
Ptot total power dissipation Tsp =25 °C; Figure1 - 1.75 W
Tstg storage temperature −55 +150 °C junction temperature −55 +150 °C
Source-drain diode source (diode forward) current (DC) Tsp =25°C - 1.45 A
ISM peak source (diode forward) current Tsp =25 °C; pulsed; tp≤10μs - 5.8 A
Philips Semiconductors PMN40LN
TrenchMOS™ logic level FET
Philips Semiconductors PMN40LN
TrenchMOS™ logic level FET Thermal characteristics
7.1 Transient thermal impedance
Table 4: Thermal characteristicsRth(j-sp) thermal resistance from junction to solder point mountedona metal clad board; Figure4 --70 K/W
Philips Semiconductors PMN40LN
TrenchMOS™ logic level FET Characteristics
Table 5: Characteristics =25 °C unless otherwise specified.
Static characteristicsV(BR)DSS drain-source breakdown voltage ID= 0.25 mA; VGS =0V =25°C 30 --V= −55°C 27 --V
VGS(th) gate-source threshold voltage ID=1 mA; VDS =VGS; Figure9 =25°C 1 1.5 2 V= 150°C 0.6 - - V= −55°C - - 2.2 V
IDSS drain-source leakage current VDS =24V; VGS =0V =25°C - 0.05 1 μA= 150°C - - 500 μA
IGSS gate-source leakage current VGS= ±15 V; VDS=0V - 10 100 nA
RDSon drain-source on-state resistance VGS= 4.5 V; ID =2A; Figure 7 and8 =25°C - 40 45 mΩ= 150°C - 64 72 mΩ
VGS=10 V; ID= 2.5A; Figure7 =25°C - 32 38 mΩ
Dynamic characteristicsQg(tot) total gate charge ID=5 A; VDD =15V; VGS =10V; Figure13 - 13.8- nC
Qgs gate-source charge - 1.8 - nC
Qgd gate-drain (Miller) charge - 2.4 - nC
Ciss input capacitance VGS =0V; VDS=25 V; f=1 MHz; Figure11 - 555 - pF
Coss output capacitance - 105 - pF
Crss reverse transfer capacitance - 70 - pF
td(on) turn-on delay time VDD =15V; RL =12Ω;
VGS =10V;RG =6Ω -ns rise time -7 -ns
td(off) turn-off delay time - 19 - ns fall time -8 -ns
Source-drain diodeVSD source-drain (diode forward) voltageIS= 1.7 A; VGS =0V; Figure12 - 0.8 1.2 V
Philips Semiconductors PMN40LN
TrenchMOS™ logic level FET