PHT4NQ10T ,N-channel TrenchMOS standard level FETPHT4NQ10TTrenchMOS™ standard level FETRev. 02 — 2 May 2002 Product dataM3D0871. DescriptionN-channe ..
PHT6N03T ,TrenchMOS transistor Standard level FET
PHT6N03T ,TrenchMOS transistor Standard level FET
PHT6N06 ,TrenchMOS transistor Standard level FETLIMITING VALUES AND CHARACTERISTICST = -55 to 175˚C unless otherwise specifiedjSYMBOL PARAMETER CON ..
PHT6N06 ,TrenchMOS transistor Standard level FETGENERAL DESCRIPTION QUICK REFERENCE DATAN-channel enhancement mode SYMBOL PARAMETER MAX. UNITlogic ..
PHT6N06LT ,N-channel TrenchMOS logic level FET
PLSI1032-80LJ , High-Density Programmable Logic
PLSI1032-90LJ , High-Density Programmable Logic
PLSI1032-90LJ , High-Density Programmable Logic
PLT101 ,Transmitter module.{‘m‘m
4 -
N E C ELECTRONICS INC 30E 1) " 13427535 C1l3ii!n8S'1 T " C-"ll-ert.
1:43-97- //
..
PLUS153BN ,Programmable logic arrays 18 ?42 ?10
PLUS153BN ,Programmable logic arrays 18 ?42 ?10
PHT4NQ10T
N-channel TrenchMOS standard level FET
PHT4NQ10T renchMOS™ standard level FET
Rev. 02 — 2 May 2002 Product dataM3D087
DescriptionN-channel enhancement mode field-effect transistor in a plastic package using
TrenchMOS™ technology.
Product availability:
PHT4NQ10T in SOT223.
Features TrenchMOS™ technology Very fast switching Surface mount package.
Applications Primary side switch in DCto DC converters High speed line driver Fast general purpose switch.
Pinning information
Table 1: Pinning - SOT223, simplified outline and symbol gate (g)
SOT223 drain (d) source (g) drain (d)
MSB002 - 1Top view
MBB076
Philips Semiconductors PHT4NQ10T
TrenchMOS™ standard level FET Quick reference data Limiting values
Table 2: Quick reference dataVDS drain-source voltage (DC) 25°C≤Tj≤ 150°C - 100 V drain current (DC) Tsp =25 °C; VGS =10V - 3.5 A
Ptot total power dissipation Tsp =25°C - 6.9 W junction temperature - 150 °C
RDSon drain-source on-state resistance VGS=10 V; ID= 1.75A =25°C 200 250 mΩ= 150°C - 575 mΩ
Table 3: Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage (DC) 25°C≤Tj≤ 150°C - 100 V
VDGR drain-gate voltage (DC) 25°C≤Tj≤ 150 °C; RGS =20kΩ - 100 V
VGS gate-source voltage (DC) - ±20 V drain current (DC) Tsp =25 °C; VGS =10V;
Figure2 and3 3.5 A
Tsp= 100 °C; VGS =10V; Figure2 - 2.2 A
IDM peak drain current Tsp =25 °C; pulsed; tp≤10 μs;
Figure3
-14 A
Ptot total power dissipation Tsp =25 °C; Figure1 - 6.9 W
Tstg storage temperature −65 +150 °C junction temperature −65 +150 °C
Source-drain diode source (diode forward) current (DC) Tsp =25°C - 3.5 A
ISM peak source (diode forward) current Tsp =25 °C; pulsed; tp≤10μs - 14 A
Avalanche ruggednessEDS(AL)S non-repetitive drain-source avalanche
energy
unclamped inductive load; ID= 3.5A;= 0.2 ms; VDD≤15 V; RGS =50Ω;
VGS=10 V; starting Tj =25 °C;
Figure4
-45 mJ
IDS(AL)SM peak non-repetitive drain-source
avalanche current 3.5 A
Philips Semiconductors PHT4NQ10T
TrenchMOS™ standard level FET
Philips Semiconductors PHT4NQ10T
TrenchMOS™ standard level FET Thermal characteristics
7.1 Transient thermal impedance
Table 4: Thermal characteristicsRth(j-sp) thermal resistance from junction to solder
point
mountedona metal clad substrate;
Figure5 - 18 K/W
Rth(j-a) thermal resistance from junction to ambient mountedona printed circuit board;
minimum footprint 150 - K/W
Philips Semiconductors PHT4NQ10T
TrenchMOS™ standard level FET Characteristics
Table 5: Characteristics =25 °C unless otherwise specified
Static characteristicsV(BR)DSS drain-source breakdown
voltage= 250 μA; VGS =0V =25°C 100 130 - V= −55 °C89 - - V
VGS(th) gate-source threshold voltageID=1 mA; VDS =VGS =25 °C; Figure10 234V= 150 °C; Figure10 1.2 - - V= −55 °C; Figure10 --6 V
IDSS drain-source leakage current VDS= 100 V; VGS =0V =25 °C- 1 25 μA= 150°C - 4 250 μA
VDS=60 V; VGS =0V =85 °C- - 1 μA
IGSS gate-source leakage current VGS= ±20 V; VDS=0V - 10 100 nA
RDSon drain-source on-state
resistance
VGS =10V; ID= 1.75A =25 °C; Figure8 and9 - 200 250 mΩ= 150 °C; Figure9 - - 575 mΩ
Dynamic characteristicsgfs forward transconductance VDS =5V; ID= 3.5A;
Figure12 4.2 S
Qg(tot) total gate charge ID= 3.5 A; VDS =80V;
VGS =10V; Figure15 7.4 - nC
Qgs gate-source charge - 1.5 - nC
Qgd gate-drain (Miller) charge - 3.3 - nC
Ciss input capacitance VGS =0V; VDS =25V;=1 MHz; Figure13 300 - pF
Coss output capacitance - 44 - pF
Crss reverse transfer capacitance - 21 - pF
td(on) turn-on delay time VDD=50 V; RD =15Ω;
VGS =10V; RG =6Ω -ns rise time - 13 - ns
td(off) turn-off delay time - 20 - ns fall time - 11 - ns
Source-drain diodeVSD source-drain (diode forward)
voltage= 3.5 A; VGS =0V;
Figure14 0.87 1.5 V
trr reverse recovery time IS= 3.5A;
dIS/dt= −100 A/μs;
VGS =0V; VDS =30V
-50 - ns recovered charge - 100 - nC
Philips Semiconductors PHT4NQ10T
TrenchMOS™ standard level FET