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PHK31NQ03LT
N-channel TrenchMOS logic level FET
Product profile1.1 General descriptionLogic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
computing, communications, consumer and industrial applications only.
1.2 Features and benefits High efficiency due to low switching
and conduction losses Suitable for logic level gate drive
sources
1.3 Applications DC-to-DC converters Notebook computers Switched-mode power supplies Voltage regulators
1.4 Quick reference data
PHK31NQ03LT
N-channel TrenchMOS logic level FET
Rev. 3 — 11 March 2011 Product data sheet
Table 1. Quick reference dataVDS drain-source voltage Tj≥25 °C; Tj≤ 150°C --30 V drain current Tsp =25°C; VGS =10V;
see Figure 1; see Figure 3
--30.4 A
Ptot total power
dissipation
Tsp =25°C; see Figure 2 --6.9 W
Static characteristicsRDSon drain-source on-state
resistance
VGS =10V; ID =25A; Tj =25°C; see Figure 10;
see Figure 11 3.45 4.4 mΩ
Dynamic characteristicsQGD gate-drain charge VGS =4.5 V; ID =25A;
VDS =12 V; see Figure 12;see Figure 13
-7.7 -nC
NXP Semiconductors PHK31NQ03LT
N-channel TrenchMOS logic level FET Pinning information Ordering information
Table 2. Pinning information source
SOT96-1 (SO8) source source G gate D drain D drain D drain D drain
Table 3. Ordering informationPHK31NQ03LT SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
NXP Semiconductors PHK31NQ03LT
N-channel TrenchMOS logic level FET Limiting values
Table 4. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage Tj≥25 °C; Tj≤ 150°C - 30 V
VDGR drain-gate voltage Tj≥25 °C; Tj≤ 150 °C; RGS =20kΩ -30 V
VGS gate-source voltage -20 20 V drain current Tsp =25 °C; VGS =10 V; see Figure 1;
see Figure 3 30.4 A
Tsp= 100 °C; VGS =10 V; see Figure 1 - 17.2 A
IDM peak drain current Tsp=25 °C; pulsed; tp≤10µs;
see Figure 3 121.8 A
Ptot total power dissipation Tsp =25 °C; see Figure 2 -6.9 W
Tstg storage temperature -55 150 °C junction temperature -55 150 °C
Source-drain diode source current Tsp =25°C - 5.7 A
ISM peak source current Tsp=25 °C; pulsed; tp≤10µs - 23.1 A
Avalanche ruggednessEDS(AL)S non-repetitive drain-source
avalanche energy
VGS =10V; Tj(init) =25°C; ID =35A;
Vsup≤25 V; unclamped; tp= 0.16 ms;
RGS =50Ω 120 mJ
NXP Semiconductors PHK31NQ03LT
N-channel TrenchMOS logic level FET Thermal characteristics
Table 5. Thermal characteristicsRth(j-sp) thermal resistance from
junction to solder point
--18 K/W
NXP Semiconductors PHK31NQ03LT
N-channel TrenchMOS logic level FET CharacteristicsTable 6. Characteristics
Static characteristicsV(BR)DSS drain-source
breakdown voltage =250 µA; VGS =0V; Tj=25°C 30 --V =250 µA; VGS =0V; Tj= -55°C 27 - - V
VGS(th) gate-source threshold
voltage =1mA; VDS =VGS; Tj =25°C;
see Figure 8; see Figure 9
1.3 1.7 2.15 V =1mA; VDS =VGS; Tj= 150 °C;
see Figure 8; see Figure 9
0.8 --V =1mA; VDS =VGS; Tj =-55 °C;
see Figure 8; see Figure 9
--2.6 V
IDSS drain leakage current VDS =30V; VGS =0V; Tj=25°C --1 µA
VDS =30V; VGS =0V; Tj= 150°C - - 100 µA
IGSS gate leakage current VGS =16V; VDS =0V; Tj=25°C - - 100 nA
VGS =-16 V; VDS =0V; Tj=25°C - - 100 nA
RDSon drain-source on-state
resistance
VGS =10V; ID =25A; Tj =25°C;
see Figure 10; see Figure 11 3.45 4.4 mΩ
VGS =10V; ID =25A; Tj= 150 °C;
see Figure 10 5.85 7.5 mΩ
VGS =4.5 V; ID =25A; Tj =25°C;
see Figure 10; see Figure 11 4.25 5.6 mΩ gate resistance f=1 MHz; VGSS(AC) = 150 mV - 1.2 - Ω
Dynamic characteristicsQG(tot) total gate charge ID =25A; VDS =12V; VGS =4.5V;
see Figure 12; see Figure 13
-33 - nC
QGS gate-source charge - 13.6 - nC
QGS1 pre-threshold
gate-source charge
-6.5 -nC
QGS2 post-threshold
gate-source charge
-7.1 -nC
QGD gate-drain charge - 7.7 - nC
VGS(pl) gate-source plateau
voltage =25A; VDS =12V; see Figure 12 -2.85 - V
Ciss input capacitance VDS =0V; VGS =0V; f=1MHz; =25°C 4900 - pF
VDS =12V; VGS=0 V; f=1 MHz; =25°C; see Figure 14 4235 - pF
Coss output capacitance - 840 - pF
Crss reverse transfer
capacitance 370 - pF
td(on) turn-on delay time VDS =12V; RL =0.5 Ω; VGS =4.5V;
RG(ext) =5.6Ω
-37 - ns rise time - 62 - ns
td(off) turn-off delay time - 54 - ns fall time - 26 - ns
NXP Semiconductors PHK31NQ03LT
N-channel TrenchMOS logic level FET
Source-drain diodeVSD source-drain voltage IS =25A; VGS =0V; Tj =25°C;
see Figure 15 0.94 1.2 V
trr reverse recovery time IS =20A; dIS/dt= -100 A/µs; VGS =0V;
VDS =30V
-52 - ns recovered charge IS =20A; dIS/dt= -100 A/µs; VGS =0V - 30 - nC
Table 6. Characteristics …continued
NXP Semiconductors PHK31NQ03LT
N-channel TrenchMOS logic level FET
