PHE13009 ,Silicon Diffused Power TransistorPhilips Semiconductors Preliminary specification Silicon Diffused Power Transistor PHE13009
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PHE13009
Silicon Diffused Power Transistor
Philips Semiconductors Preliminary specification
Silicon Diffused Power Transistor PHE13009
GENERAL DESCRIPTIONThe PHE13009 is a silicon npn power switching transistor in the TO220AB envelope intended for use in high
frequency electronic lighting ballast applications, converters, inverters, switching regulators, motor control systems,
etc.
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS TYP. MAX. UNITVCESM Collector-emitter voltage peak value VBE = 0 V - 700 V
VCBO Collector-Base voltage (open emitter) - 700 V
VCEO Collector-emitter voltage (open base) - 400 V Collector current (DC) - 12 A
ICM Collector current peak value - 24 A
Ptot Total power dissipation Tmb ≤ 25 ˚C - 80 W
VCEsat Collector-emitter saturation voltage IC = 5.0 A;IB = 1.0 A 0.32 1.0 V
hFEsat IC = 5.0 A; VCE = 5 V - 40 Fall time IC = 5.0 A; IB1 = 1.0 A 0.1 0.5 μs
PINNING - TO220AB PIN CONFIGURATION SYMBOL
PIN DESCRIPTION base collector emitter
tab collector
LIMITING VALUESLimiting values in accordance with the Absolute Maximum Rating System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNITVCESM Collector to emitter voltage VBE = 0 V - 700 V
VCEO Collector to emitter voltage (open base) - 400 V
VCBO Collector to base voltage (open emitter) - 700 V Collector current (DC) - 12 A
ICM Collector current peak value - 24 A Base current (DC) - 6 A
IBM Base current peak value - 12 A
Ptot Total power dissipation Tmb ≤ 25 ˚C - 80 W
Tstg Storage temperature -65 150 ˚C Junction temperature - 150 ˚C
THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS TYP. MAX. UNITRth j-mb Junction to mounting base - 1.56 K/W
Rth j-a Junction to ambient in free air 60 - K/W3
tab
Philips Semiconductors Preliminary specification
Silicon Diffused Power Transistor PHE13009
STATIC CHARACTERISTICSTmb = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNITICES,ICBO Collector cut-off current 1 VBE = 0 V; VCE = VCESMmax - - 1.0 mA
ICES VBE = 0 V; VCE = VCESMmax; - - 5.0 mA
Tj = 125 ˚C
ICEO Collector cut-off current VCEO = VCEOMmax (400V) - - 0.1 mAIEBO Emitter cut-off current VEB = 9 V; IC = 0 A - - 1 mA
VCEOsust Collector-emitter sustaining voltage IB = 0 A; IC = 10 mA; 400 - - V
L = 25 mH
VCEsat Collector-emitter saturation voltage IC = 5.0 A;IB = 1.0 A - 0.32 1.0 V
IC = 8.0 A;IB = 1.6 A - - 2.0 V BEsat Base-emitter saturation voltage IC = 5.0 A;IB = 1.0 A - 1.0 1.3 V
IC = 8.0 A;IB = 1.6 A - 1.1 1.6 V
hFE DC current gain IC = 5.0 A; VCE = 5 V 8 - 40h FEsat IC = 8.0 A; VCE = 5 V 6 - 30
DYNAMIC CHARACTERISTICSTmb = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS TYP. MAX. UNITSwitching times (resistive load) ICon = 5 A; IBon = -IBoff = 1 A;
RL = 75 ohms; VBB2 = 4 V; Turn-off storage time 2.2 3.3 μs Turn-off fall time 0.26 0.7 μs
Switching times (inductive load) ICon = 5 A; IBon = 1 A; LB = 1 μH;
-VBB = 5 V Turn-off storage time 1.35 2.3 μs Turn-off fall time 0.1 0.5 μs
Switching times (inductive load) ICon = 5A; IBon = 1 A; LB = 1 μH;
-VBB = 5 V; Tj = 100 ˚C Turn-off storage time - 3.2 μstf Turn-off fall time - 0.9 μs
Philips Semiconductors Preliminary specification
Silicon Diffused Power Transistor PHE13009
Fig.1. Test circuit for VCEOsust.
Fig.2. Oscilloscope display for VCEOsust.
Fig.3. Test circuit resistive load. VIM = -6 to +8 V
VCC = 250 V; tp = 20 μs; δ = tp / T = 0.01.
Fig.4. Switching times waveforms with resistive load.
Fig.5. Test circuit inductive load.
Fig.6. Switching times waveforms with inductive load.
+ 50v
100-200R
Horizontal
Vertical30-60 Hz
300R
90 %90 %
ICon
VCEOsust
IC / mA
250IBon
-VBB
T.U.T.
VCC
T.U.T.0
VIM
-IBoff
10 %
Fig.9. Collector-Emitter saturation voltage.
Solid lines = typ values, VCEsat = f(IB); Tj=25˚C.
Fig.11. Collector-Emitter saturation voltage.
Solid lines = typ values, VCEsat = f(IC); at IC/IB =5.
Fig.12. Transient thermal impedance.
Zth j-mb = f(t); parameter D = tp/T
VBEsat VOLTAGE/V
0.5 0.8 3 5 79 12
IC, COLLECTOR CURRENT/A
0.01 0.1 1 100
IB/A1A 1E-06 1E-04 1E-02 1E+00
t / s10
0.01
Fig.13. Reverse bias safe operating area (Tj < Tjmax)
for -Vbe = 5V,3V and 1V.
Fig.14. Test circuit for reverse bias safe operating
area. 100 200 300 400 500 600 700 800 900
VCEclamp/V
-5V
-3V
-1VIBon
-VBB
T.U.T.
PROBE POINT
VCL(RBSOAR)
Philips Semiconductors Preliminary specification
Silicon Diffused Power Transistor PHE13009
MECHANICAL DATADimensions in mm
Net Mass: 2 g
Fig.15. TO220AB; pin 2 connected to mounting base.
Notes1. Refer to mounting instructions for TO220 envelopes.
2. Epoxy meets UL94 V0 at 1/8".
10,3
max3,0 max
not tinned
2,4
0,6
4,5
max
15,8max
1,3
2,54 2,54
13,5min