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Partno	Mfg	Dc	Qty	Available	Descript
PHB66NQ03LT	NXP/PH	N/a	10000	avai	N-channel TrenchMOS logic level FET

PHB66NQ03LT ,N-channel TrenchMOS logic level FETApplications„ DC-to-DC convertors„ General purpose switching1.4 Quick reference data Table 1. Quick ..
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PHB66NQ03LT
N-channel TrenchMOS logic level FET
PHB66NQ03LT
N-channel TrenchMOS logic level FET
Rev. 07 — 30 January 2009 Product data sheet Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
computing, communications, consumer and industrial applications only.
1.2 Features and benefits Low conduction losses due to low
on-state resistance Suitable for logic level gate drive
sources
1.3 Applications DC-to-DC convertors „ General purpose switching
1.4 Quick reference data Table 1. Quick reference
VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - - 25 V drain current Tmb =25°C; VGS=10V --66 A
Ptot total power
dissipation
Tmb=25 °C; see Figure 2 --93 W
Dynamic characteristics
QGD gate-drain charge VGS =5V; ID =50A;
VDS =15V; Tj =25°C;
see Figure 11
-3.6 -nC
Static characteristics
RDSon drain-source
on-state resistance
VGS =10V; ID =25A; =25 °C; see Figure 9;
see Figure 10 9.1 10.5 mΩ
NXP Semiconductors PHB66NQ03LT
N-channel TrenchMOS logic level FET Pinning information
[1] It is not possible to make a connection to pin 2. Ordering information
Table 2. Pinning information gate
SOT404
(D2PAK) drain [1] source D mounting base; connected to
drain
Table 3. Ordering information
PHB66NQ03LT D2PAK plastic single-ended surface-mounted package (D2PAK); 3 leads (one
lead cropped)
SOT404
NXP Semiconductors PHB66NQ03LT
N-channel TrenchMOS logic level FET Limiting valuesTable 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - 25 V
VDGR drain-gate voltage Tj≥25 °C; Tj≤ 175 °C; RGS =20kΩ -25 V
VGS gate-source voltage -20 20 V drain current VGS =10V; Tmb =100°C - 45 A
VGS =5V; Tmb= 100 °C; see Figure 1 -40 A
VGS =5V; Tmb =25°C; see Figure 1;
see Figure 3
-57 A
VGS =10V; Tmb =25°C - 66 A
IDM peak drain current tp≤10 µs; pulsed; Tmb =25°C; see Figure 3 -228 A
Ptot total power dissipation Tmb =25°C; see Figure 2 -93 W
Tstg storage temperature -55 175 °C junction temperature -55 175 °C
Source-drain diode source current Tmb =25°C - 57 A
ISM peak source current tp≤10 µs; pulsed; Tmb =25°C - 228 A
Avalanche ruggedness
EDS(AL)S non-repetitive
drain-source avalanche
energy
VGS =10V; Tj(init) =25°C; ID =43A; Vsup≤25V;
unclamped; tp= 0.15 ms; RGS =50Ω
-90 mJ
NXP Semiconductors PHB66NQ03LT
N-channel TrenchMOS logic level FET
NXP Semiconductors PHB66NQ03LT
N-channel TrenchMOS logic level FET Thermal characteristics
Table 5. Thermal characteristics
Rth(j-a) thermal resistance from
junction to ambient
mounted on a printed-circuit board;
minimum footprint; vertical in still air
-50 - K/W
Rth(j-mb) thermal resistance from
junction to mounting
base
see Figure 4 --1.6 K/W
NXP Semiconductors PHB66NQ03LT
N-channel TrenchMOS logic level FET CharacteristicsTable 6. Characteristics
Static characteristics
V(BR)DSS drain-source
breakdown voltage =250 µA; VGS =0V; Tj =-55°C 22 - - V =250 µA; VGS =0V; Tj =25°C 25 - - V
VGS(th) gate-source threshold
voltage =1mA; VDS = VGS; Tj =-55 °C;
see Figure 7; see Figure 8
--2.2 V =1mA; VDS = VGS; Tj= 175 °C;
see Figure 7; see Figure 8
0.5 - - V =1mA; VDS = VGS; Tj =25°C;
see Figure 7; see Figure 8
11.5 2 V
IDSS drain leakage current VDS =25V; VGS =0V; Tj=25°C --10 µA
VDS =25V; VGS =0V; Tj= 175°C - - 500 µA
IGSS gate leakage current VGS =15V; VDS =0V; Tj=25°C - 10 100 nA
VGS =-15 V; VDS =0V; Tj=25°C - 10 100 nA
RDSon drain-source on-state
resistance
VGS =10V; ID =25A; Tj= 175 °C;
see Figure 9; see Figure 10 16.4 18.9 mΩ
VGS =5V; ID =25A; Tj =25°C;
see Figure 9; see Figure 10
-11.2 13.6 mΩ
VGS =10V; ID =25A; Tj =25°C;
see Figure 9; see Figure 10
-9.1 10.5 mΩ
Dynamic characteristics
QG(tot) total gate charge ID =50A; VDS =15V; VGS =5V; =25°C; see Figure 11
-12 - nC
QGS gate-source charge - 4.5 - nC
QGD gate-drain charge - 3.6 - nC
Ciss input capacitance VDS =25V; VGS=0 V; f=1 MHz; =25°C; see Figure 12 860 - pF
Coss output capacitance - 330 - pF
Crss reverse transfer
capacitance 145 - pF
td(on) turn-on delay time VDS =15V; RL =0.6 Ω; VGS =5V;
RG(ext) =5.6 Ω; Tj =25°C
-15 25 ns rise time - 90 135 ns
td(off) turn-off delay time - 25 40 ns fall time - 25 40 ns
Source-drain diode
VSD source-drain voltage IS =25A; VGS =0V; Tj =25°C;
see Figure 13 0.95 1.2 V
trr reverse recovery time IS =10A; dIS/dt= -100 A/µs; VGS =0V;
VDS =25V; Tj =25°C
-32 - ns recovered charge - 20 - nC
NXP Semiconductors PHB66NQ03LT
N-channel TrenchMOS logic level FET

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