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PHB32N06LT
N-channel TrenchMOS logic level FET
PHB32N06LT
N-channel TrenchMOS logic level FET
Rev. 02 — 30 November 2009 Product data sheet Product profile
1.1 General descriptionLogic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
computing, communications, consumer and industrial applications only.
1.2 Features and benefits Suitable for logic level gate drive
sources
1.3 Applications General purpose switching Switched-mode power supplies
1.4 Quick reference data Table 1. Quick referenceVDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - - 60 V drain current Tmb =25°C; VGS =5V;
see Figure 1 and 3
--34 A
Ptot total power
dissipation
Tmb =25°C;
see Figure 2
--97 W
Dynamic characteristicsQGD gate-drain charge VGS =5V; ID =20A;
VDS =44V; Tj =25°C;
see Figure 11
-8.5 -nC
Static characteristicsRDSon drain-source
on-state resistance
VGS= 4.5 V; ID =20A; =25°C 31.5 43 mΩ
VGS =5V; ID =20A; =25°C;
see Figure 9 and 10 3040mΩ
NXP Semiconductors PHB32N06LT
N-channel TrenchMOS logic level FET Pinning information[1] It is not possible to make a connection to pin 2.
Ordering information Limiting values
Table 2. Pinning information gate
SOT404 (D2PAK) drain [1] source D mounting base; connected to
drain
Table 3. Ordering informationPHB32N06LT D2PAK plastic single-ended surface-mounted package (D2PAK); 3 leads (one
lead cropped)
SOT404
Table 4. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - 60 V
VDGR drain-gate voltage RGS =20kΩ -60 V
VGS gate-source voltage -15 15 V drain current VGS =5V; Tmb= 100 °C; see Figure 1 -24 A
VGS =5V; Tmb =25°C; see Figure 1 and 3 -34 A
IDM peak drain current tp≤10 µs; pulsed; Tmb =25°C; see Figure 3 -136 A
Ptot total power dissipation Tmb =25°C; see Figure 2 -97 W
Tstg storage temperature -55 175 °C junction temperature -55 175 °C
VGSM peak gate-source
voltage
pulsed; tp≤50µs -20 20 V
Source-drain diode source current Tmb =25°C - 34 A
ISM peak source current tp≤10 µs; pulsed; Tmb =25°C - 136 A
Avalanche ruggednessEDS(AL)S non-repetitive
VGS =5V; Tj(init) =25°C; ID =20A; Vsup≤25V;
-100 mJ
NXP Semiconductors PHB32N06LT
N-channel TrenchMOS logic level FET
NXP Semiconductors PHB32N06LT
N-channel TrenchMOS logic level FET CharacteristicsTable 5. Characteristics
Static characteristicsV(BR)DSS drain-source
breakdown voltage =0.25mA; VGS =0V; Tj =-55°C 55 - - V =0.25mA; VGS =0V; Tj =25°C 60 - - V
VGS(th) gate-source threshold
voltage =1mA; VDS= VGS; Tj =-55 °C;
see Figure 8
--2.3 V =1mA; VDS= VGS; Tj =25°C;
see Figure 8
11.5 2 V =1mA; VDS= VGS; Tj =175 °C;
see Figure 8
0.5 - - V
IDSS drain leakage current VDS =60V; VGS =0V; Tj=25°C - 0.05 10 µA
VDS =60V; VGS =0V; Tj= 175°C - - 500 µA
IGSS gate leakage current VGS =10V; VDS =0V; Tj=25°C - 2 100 nA
VGS =-10 V; VDS =0V; Tj=25°C - 2 100 nA
RDSon drain-source on-state
resistance
VGS =4.5 V; ID =20A; Tj=25°C - 31.5 43 mΩ
VGS =5V; ID =20A; Tj =175 °C;
see Figure 9 and 10
--84 mΩ
VGS =10V; ID =20A; Tj=25°C - 26 37 mΩ
VGS =5V; ID =20A; Tj =25°C;
see Figure 9 and 10
-30 40 mΩ
Dynamic characteristicsQG(tot) total gate charge ID =20A; VDS =44V; VGS =5V; =25°C; see Figure 11
-17 - nC
QGS gate-source charge - 3 - nC
QGD gate-drain charge - 8.5 - nC
Ciss input capacitance VDS =25V; VGS=0 V; f=1 MHz; =25°C; see Figure 12 920 1280 pF
Coss output capacitance - 160 200 pF
Crss reverse transfer
capacitance 100 155 pF
td(on) turn-on delay time VDS =30V; RL =1.2 Ω; VGS =5V;
RG(ext) =10 Ω; Tj =25°C
-14 - ns rise time - 120 - ns
td(off) turn-off delay time - 45 - ns fall time - 55 - ns
Source-drain diodeVSD source-drain voltage IS =25A; VGS =0V; Tj =25°C;
see Figure 7 1.2 V
trr reverse recovery time IS =20A; dIS/dt= -100 A/µs; VGS =-10V;
VDS =30V; Tj =25°C
-36 - ns recovered charge - 70 - nC
NXP Semiconductors PHB32N06LT
N-channel TrenchMOS logic level FET
NXP Semiconductors PHB32N06LT
N-channel TrenchMOS logic level FET