PGA112AIDGSR ,Zero-Drift, Programmable Gain Amplifier with MUX 10-VSSOP -40 to 125Features 2 Applications1• Rail-to-Rail Input and Output • Remote e-Meter Reading• Offset: 25μV (Typ ..
PGA112AIDGST ,Zero-Drift, Programmable Gain Amplifier with MUX 10-VSSOP -40 to 125 SBOS424C–MARCH 2008–REVISED NOVEMBER 20155 Device ComparisonSHUTDOWNNO. OF MUX GAINS SPI DAISY-DEV ..
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PL-2301 , USB TO USB BRIDGE CONTROLLER
PL2303 , PL-2303 USB to RS-232 Bridge Controller Product Datasheet
PL-2303 , PL-2303 USB to RS-232 Bridge Controller Product Datasheet
PL-2303 , PL-2303 USB to RS-232 Bridge Controller Product Datasheet
PL-2303 , PL-2303 USB to RS-232 Bridge Controller Product Datasheet
PL-2305 , USB TO IEEE1284 BRIDGE CONTROLLER Bi-Direction Parallel Interface
PGA112AIDGSR-PGA112AIDGST
Zero-Drift, Programmable Gain Amplifier with MUX
ADC
G = 1 RF
Output
Stage
SPI
VOUT5
DVDD
AVDD
MSP430Microcontroller
+3V
+5V
VREF
PGA112
PGA113 /CH0CAL
CAL3
CAL4
CAL1
CAL2
MUX
0.1F
BYPASS
0.1F
BYPASS
0.1F
BYPASS
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Design
PGA112, PGA113, PGA116, PGA117SBOS424C –MARCH 2008–REVISED NOVEMBER 2015
PGA11x Zerø-Drift Programmable Gain Amplifier With Mux Features 2 Applications Rail-to-Rail Input and Output • Remote e-Meter Reading Offset:25 μV (Typical), 100 μV (Maximum) • Automatic Gain Control Zerø Drift: 0.35 μV/°C (Typical), 1.2 μV/°C • Portable Data Acquisition
(Maximum) • PC-Based Signal Acquisition Systems Low Noise:12 nV/√Hz • Test and Measurement Input Offset Current: ±5 nA Maximum (25°C) • Programmable Logic Controllers Gain Error: 0.1% Maximum(G≤ 32), • Battery-Powered Instruments
0.3% Maximum(G> 32) • Handheld Test Equipment Binary Gains:1,2,4,8, 16, 32, 64, 128 (PGA112,
PGA116)
3 Description Scope Gains:1,2,5, 10, 20, 50, 100, 200 The PGA112 and PGA113 devices (binary and scope
(PGA113, PGA117) gains) offer two analog inputs,a three-pin SPI
interface, and software shutdownina 10-pin, VSSOP• Gain Switching Time: 200ns package. The PGA116 and PGA117 (binary and• 2 Channel MUX: PGA112, PGA113 scope gains) offer 10 analog inputs,a SPI interface10 Channel MUX: PGA116, PGA117 with daisy-chain capability, and hardware and Four Internal Calibration Channels software shutdownina 20-pin TSSOP package. Amplifier Optimized for Driving CDAC ADCs All versions provide internal calibration channels for Output Swing: 50 mVto Supply Rails system-level calibration. The channels are tied to
GND, 0.9 VCAL, 0.1 VCAL, and VREF, respectively.• AVDD and DVDDfor Mixed Voltage Systems VCAL, an external voltage connectedto Channel0,is• IQ= 1.1 mA (Typical) used as the system calibration reference. Binary Software and Hardware Shutdown:IQ≤4 μA gains are:1,2,4,8, 16, 32, 64, and 128; scope gains
(Typical) are:1,2,5, 10, 20, 50, 100, and 200. Temperature Range: –40°Cto 125°C
Device Information(1) SPI™ Interface (10 MHz) With Daisy-ChainCapability
(1) Forall available packages, see the orderable addendumat
the endofthe data sheet.
Simplified Schematic
