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PUMD13NXP/PHILIPSN/a3000avaiNPN/PNP resistor-equipped transistors
PUMD13NXPN/a93000avaiNPN/PNP resistor-equipped transistors
PEMD13NXPN/a148000avaiNPN/PNP resistor-equipped transistors; R1 = 4.7 k惟, R2 = 47 k惟


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PEMD13-PUMD13
NPN/PNP resistor-equipped transistors; R1 = 4.7 k惟, R2 = 47 k惟
1. Product profile
1.1 General description

NPN/PNP double Resistor-Equipped Transistors (RET) in Surface-Mounted
Device (SMD) plastic packages.
1.2 Features and benefits

1.3 Applications

1.4 Quick reference data

PEMD13; PUMD13
NPN/PNP resistor-equipped transistors;
R1 = 4.7 k, R2 = 47 k
Rev. 3 — 7 December 2011 Product data sheet
Table 1. Product overview

PEMD13 SOT666 - PEMB13 PEMH13 ultra small and flat
lead
PUMD13 SOT363 SC-88 PUMB13 PUMH13 very small 100 mA output current capability  Reduces component count Built-in bias resistors  Reduces pick and place costs Simplifies circuit design  AEC-Q101 qualified Low current peripheral driver Control of IC inputs Replaces general-purpose transistors in digital applications
Table 2. Quick reference data
Per transistor; for the PNP transistor (TR2) with negative polarity

VCEO collector-emitter voltage open base - - 50 V output current - - 100 mA bias resistor 1 (input) 3.3 4.7 6.1 k
R2/R1 bias resistor ratio 8 10 12
NXP Semiconductors PEMD13; PUMD13
NPN/PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 47 k
2. Pinning information

3. Ordering information

4. Marking

[1] * = placeholder for manufacturing site code
Table 3. Pinning
Table 4. Ordering information

PEMD13 - plastic surface-mounted package; 6 leads SOT666
PUMD13 SC-88 plastic surface-mounted package; 6 leads SOT363
Table 5. Marking codes

PEMD13 Z1
PUMD13 3*1
NXP Semiconductors PEMD13; PUMD13
NPN/PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 47 k
5. Limiting values

[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
[2] Reflow soldering is the only recommended soldering method.
Table 6. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).
Per transistor; for the PNP transistor (TR2) with negative polarity

VCBO collector-base voltage open emitter - 50 V
VCEO collector-emitter voltage open base - 50 V
VEBO emitter-base voltage open collector - 5 V input voltage TR1
positive - +30 V
negative - 5V
input voltage TR2
positive - +5 V
negative - 30 V output current - 100 mA
ICM peak collector current single pulse;  1ms
-100 mA
Ptot total power dissipation Tamb25C
PEMD13 (SOT666) [1][2] -200 mW
PUMD13 (SOT363) [1] -200 mW
Per device

Ptot total power dissipation Tamb25C
PEMD13 (SOT666) [1][2] -300 mW
PUMD13 (SOT363) [1] -300 mW junction temperature - 150 C
Tamb ambient temperature 65 +150 C
Tstg storage temperature 65 +150 C
NXP Semiconductors PEMD13; PUMD13
NPN/PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 47 k

6. Thermal characteristics

[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Reflow soldering is the only recommended soldering method.
Table 7. Thermal characteristics
Per transistor

Rth(j-a) thermal resistance from
junction to ambient
in free air
PEMD13 (SOT666) [1][2]- - 625 K/W
PUMD13 (SOT363) [1]- - 625 K/W
Per device

Rth(j-a) thermal resistance from
junction to ambient
in free air
PEMD13 (SOT666) [1][2]- - 417 K/W
PUMD13 (SOT363) [1]- - 417 K/W
NXP Semiconductors PEMD13; PUMD13
NPN/PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 47 k

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