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Partno Mfg Dc Qty AvailableDescript
PEB24902HSIMENSN/a355avaiISDN Line Card Transceiver
PEB24902HSIEMENSN/a31avaiISDN Line Card Transceiver
PEB24902HINFINEONN/a400avaiISDN Line Card Transceiver
PEF24902HINFINEONN/a42avaiISDN Line Card Transceiver


PEB24902H ,ISDN Line Card TransceiverData Sheet, DS2, Jan. 2001Quad IEC AFEQuad ISDN Echocancellation Circuit Analogue Front EndPEB 2490 ..
PEB24902H ,ISDN Line Card TransceiverData Sheet, DS2, Jan. 2001Quad IEC AFEQuad ISDN Echocancellation Circuit Analogue Front EndPEB 2490 ..
PEB24902H ,ISDN Line Card TransceiverData Sheet, DS2, Jan. 2001Quad IEC AFEQuad ISDN Echocancellation Circuit Analogue Front EndPEB 2490 ..
PEB3035NV1.1 ,PRISM (Primary Rate Interface Signall...FeaturesSerial Interface● Two independent signaling/maintenance channelsprogrammable in a– serial m ..
PEB3065NV3.2 ,SLICOFI (Signal Processing Subscriber...Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .558.1 Frequency Re ..
PEB3065NV3.2 ,SLICOFI (Signal Processing Subscriber...characteristics.Terms of delivery and rights to change design reserved.For questions on technology, ..
PIC17C42A , High-Performance 8-Bit CMOS EPROM/ROM Microcontroller
PIC18F2525-I/SO , 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
PIC18F2620-I/SO , 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
PIC18F2620-I/SO , 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
PIC18F2620-I/SP , 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
PIC18F4620-I/ML , 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology


PEB24902H-PEF24902H
ISDN Line Card Transceiver


Quad IEC AFE
Quad ISDN Echocancellation rcuit Analogue Front End
PEB 24902 Version 2.1
Quad IEC AFE
Quad ISDN Echocancellation rcuit Analogue Front End
PEF 24902 Version 2.1
For questions on technology, delivery and prices please contact the Infineon
Technologies Offices in Germany or the Infineon Technologies Companies and
Representatives worldwide: see our webpage at http://www.infineon.com
PEB 24902
Revision History:2001-01-23
DS2
Previous Version: none
Table of ContentsPageOverview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.4Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.5Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6System Integration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.1Line Card Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Technical Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.1Clock Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.1.1Specification of the PLL and the 15.36 MHz Master Clock (Pin CL15) . 15
3.1.2Specification of the Crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.2Analogue Line Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.2.1Analogue-to-Digital Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.2.2Range Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.2.3Digital-to-Analogue Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.2.4External Hybrid and Transformer Parameters . . . . . . . . . . . . . . . . . . . . 27
3.2.5Analogue Loop-back Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.2.6Level Detect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.2.7Power down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.2.8Power-on-Reset (POR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.2.9Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
3.3Digital Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
3.3.1Frame structure on the Digital Interface in the 2B1Q Mode . . . . . . . . . 33
3.3.2Frame structure on the Digital Interface in the 4B3T mode . . . . . . . . . . 34
3.3.3Propagation Delay in transmit direction . . . . . . . . . . . . . . . . . . . . . . . . . 36
3.4Boundary Scan Test Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37Digital Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
4.1Static Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
4.2Boundary Scan Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
5.1Supply Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
5.2Power Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44Environmental Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
7.1Storage and Transportation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
7.2Operating Ambient . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
7.3Thermal Contact Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
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