PEB2096 ,ICs for Communications Extended PCM Interface Controllercharacteristics.Terms of delivery and rights to change design reserved.Due to technical requirement ..
PEB22320N V2.1 ,PRACT (Primary Rate Access Clock Gene...Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
PEB22320N V2.1 ,PRACT (Primary Rate Access Clock Gene...Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
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PEB22320NV2.1 ,PRACT (Primary Rate Access Clock Gene...Characteristics31 Recommended Oscillator Circuits32, 33 Crystal Tuning RangeData ClassificationMaxi ..
PEB22320NV2.1 .. ,PRACT (Primary Rate Access Clock Gene...characteristics apply at T =25°C and the given supply voltage.AOperating RangeIn the operating rang ..
PIC17C42A , High-Performance 8-Bit CMOS EPROM/ROM Microcontroller
PIC18F2525-I/SO , 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
PIC18F2620-I/SO , 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
PIC18F2620-I/SO , 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
PIC18F2620-I/SP , 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
PIC18F4620-I/ML , 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
PEB2096
ICs for Communications Extended PCM Interface Controller
ICs for Communications
Octal Transceiver for UPN Interfaces
OCTAT-P
PEB 2096 Version 2.1
Data Sheet04.99
DS 2
For questions on technology, delivery and prices please contact the Infineon Technologies Offices
in Germany or the Infineon Technologies Companies and Representatives worldwide:
see our webpage at http://www.infineon.com
Edition 04.99
Published by Infineon Technologies AG i. Gr.,
SC,
Balanstraße 73,
81541 München© InfineonTechnologiesAG i.Gr. 1999.
All Rights Reserved.
Attention please!As far as patents or other rights of third parties are concerned, liability is only assumed for components, not for
applications, processes and circuits implemented within components or assemblies.
The information describes the type of component and shall not be considered as assured characteristics.
Terms of delivery and rights to change design reserved.
Due to technical requirements components may contain dangerous substances. For information on the types in
question please contact your nearest InfineonTechnologies Office.
InfineonTechnologiesAG is an approved CECC manufacturer.
PackingPlease use the recycling operators known to you. We can also help you – get in touch with your nearest sales
office. By agreement we will take packing material back, if it is sorted. You must bear the costs of transport.
For packing material that is returned to us unsorted or which we are not obliged to accept, we shall have to invoice
you for any costs incurred.
Components used in life-support devices or systems must be expressly authorized for such purpose!Critical components1 of the InfineonTechnologiesAG, may only be used in life-support devices or systems2 with
the express written approval of the InfineonTechnologiesAG.A critical component is a component used in a life-support device or system whose failure can reasonably be
expected to cause the failure of that life-support device or system, or to affect its safety or effectiveness of that
device or system.
PEB 2096
Table of ContentsPageOverview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-1
1.1Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-3
1.2Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-4
1.3Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-5
1.4Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-6
1.5Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-8
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-1
2.1Device Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-1
2.2Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-1
2.2.1General Principle of the UPN Interface . . . . . . . . . . . . . . . . . . . . . . . . . .2-1
2.2.2IOM®-2 System Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-4
2.2.3JTAG Boundary Scan Test Interface . . . . . . . . . . . . . . . . . . . . . . . . . . .2-7
2.2.3.1Boundary Scan Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-8
2.2.3.2TAP Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-9
2.3Individual Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-12
2.3.1Transceiver, Analog Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-12
2.3.2Transmit PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-14
2.3.3Receive PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-14
2.3.4Receive Signal Oversampling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-15
2.3.5Activation / Deactivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-16
2.3.6Diagnostic Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-16
Operational Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-1
3.1General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-1
3.2Clocking, Reset and Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-1
3.3Tristate Capability on IOM-2 Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-1
3.4Push – Pull Sensing on Pin DU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-1
3.5Transmit Delay on UPN Interface in respect to IOM®-2 Interface . . . . . . . .3-2
3.6UPN Multiframe Synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-3
3.6.1Synchronization with a Short FSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-3
3.6.2Synchronization using SSYNC (for DECT) . . . . . . . . . . . . . . . . . . . . . .3-4
3.7D-Channel Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-5
3.8IOM®-2 Interface Monitor Channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-8
3.9Command / Indicate Channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-11
3.10Activation and Deactivation, State Machine . . . . . . . . . . . . . . . . . . . . . .3-13
3.10.1States Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-13
3.10.2Info Structure on the UPN Interface . . . . . . . . . . . . . . . . . . . . . . . . . . .3-16
3.10.3Example of Activation and Deactivation . . . . . . . . . . . . . . . . . . . . . . .3-18
Registers Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-1
4.1Identification Register – (Read) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-1
4.2General Configuration Register – (Write) . . . . . . . . . . . . . . . . . . . . . . . . .4-2
PEB 2096
Table of ContentsPage4.4Test Registers – (Read/Write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-2
4.5Line Delay Measurement of the UPN Interface . . . . . . . . . . . . . . . . . . . . . .4-3
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-1
5.1Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-1
5.2DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-2
5.3Capacitances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-4
5.4AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-5
5.5Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-6
5.6Timing of the IOM® Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-7
5.7Boundary Scan Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-10
5.8UPN Frame Relation to FSC in Transmit Direction . . . . . . . . . . . . . . . . . .5-12
5.9Transceiver Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-14
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-1
PEB 2096
OverviewOverviewThe new Infineon Technologies generation of highly integrated ISDN circuits enables
design engineers to decrease board size and thus PBX size and its production costs.
Figure 1-1 shows an example of a PBX for 16 ISDN and 16 analog subscribers withtrunk lines realized with a few highly integrated chips of the new Infineon Technologies
family of PBX and Line Card ICs: DOC, SICOFI-4, OCTAT-P and QUAT-S.
Figure 1-1Application Example
PBX for 32 Subscribers with 4 Trunk Lines using one DOC
DOC, DSP Oriented PBX Controller, PEB 20560. The DOC integrates many different
