PEB2046NVA3 ,MTSS (Memory Time Switch Small)Memory Time Switch Small (MTSS) PEB 2046
PEB2046N-VA3 ,MTSS (Memory Time Switch Small)General DescriptionType PackageThe MTSS PEB 2046 is a monolithic CMOS device which has PEB 2046-N P ..
PEB2046NVA3 .. ,MTSS (Memory Time Switch Small)Featuresspeech memory SM. The incoming 256 channels • Time/space switch for 2.048-kbit/s PCM system ..
PEB2047-16N ,MTSL (Memory Time Switch Large)ICs for CommunicationsMemory Time Switch LargeMTSLPEB 2047PEB 2047-16Version 2.1Data Sheet 03.95Edi ..
PEB2047-16N ,MTSL (Memory Time Switch Large)characteristics.Terms of delivery and rights to change design reserved.For questions on technology, ..
PEB2047-16-N ,MTSL (Memory Time Switch Large)applications, pro-cesses and circuits implemented within com-ponents or assemblies.The information ..
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PEB2046NVA3-PEB2046N-VA3-PEB2046NVA3 ..
MTSS (Memory Time Switch Small)
Memory Time Switch Small (MTSS)
General Description
The MTSS PEB 2046 is a monolithic CMOS device which has
the ability to connect any of the 256 PCM channels of eight
incoming PCM lines to any of the 256 PCM channels of eight
output lines.
The input information of a complete frame is stored in the
speech memory SM. The incoming 256 channels
of 8 bits each are written in sequence into fixed positions in
the SM. This is controlled by the input counter in the timing
control block with an 8-kHz repetition rate.
For output, the connection memory (CM) is read in sequence.
Each location in CM points to a location in the speech
memory. The byte in this speech memory location is read into
the current output time-slot. The read access of the CM is
controlled by the output counter which also resides in the
timing control block.
Thus the CM needs to be programmed beforehand for the
desired connection. The CM address corresponds to one
particular output time-slot and line number. The contents of
this CM-address point to a particular input time-slot and line
number (now resident in the SM).
Timing Control
Block Diagram
PEB 2046
Type Package
PEB 2046-N P-LCC-44-1 (SMD)
PEB 2046-P P-DIP-40-1
Features
Connection
lo Intgrgce Memory
Time/space switch for 2.048-kbit/s PCM systems
Switching of up to 256 incoming PCM channels to up to
256 outgoing PCM channels
Eight input and eight output PCM lines
CoMgurable for a 4096- and 8192-kHz device clock
Tristate function for further expansion and tandem
operation
8-bit uP-interface
Single +5-V power supply
Advanced low power CMOS technology
Input Buffer
Speech Memory
Output Buffer
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ITB00604
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