PCK351DB ,PCK351; 1:10 clock distribution device with 3-State outputsPCK3511:10 clock distribution device with 3-State outputsRev. 01 — 14 May 2002 Product data1. Descr ..
PCK351DB ,PCK351; 1:10 clock distribution device with 3-State outputsPCK3511:10 clock distribution device with 3-State outputsRev. 01 — 14 May 2002 Product data1. Descr ..
PCK351DB ,PCK351; 1:10 clock distribution device with 3-State outputs
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PCK351DB
PCK351; 1:10 clock distribution device with 3-State outputs
PCK3511:10 clock distribution device with 3-State outputs
Rev. 01 — 14 May 2002 Product data DescriptionThe PCK351 is a high-performance 3.3 V LVTTL clock distribution device. The
PCK351 enables a single clock input to be distributed to ten outputs with minimum
output skew and pulse skew. The useof distributed VCC and GND pinsin the PCK351
ensures reduced switching noise.
The PCK351 is characterized for operation over the supply range 3.0Vto 3.6 V, and
over the industrial temperature range −40to +85 °C.
Features 1:10 LVTTL clock distribution Low output to output skew Low output pulse skew Over voltage tolerant inputs and outputsL VTTL-compatible inputs and outputs Distributed VCC and ground pins reduce switching noise Balanced High-drive outputs (−32 mA IOH, 32 mA IOL) Reduced power dissipation due to the state-of-the-art QUBiC-LP process Supply range of +3.0Vto +3.6V Package options include plastic small-outline (D) and shrink small-outline (DB)
packages Industrial temperature range −40to +85°C PCK351 is identical to and replaces PTN3151.
Philips Semiconductors PCK351
1:10 clock distribution device with 3-State outputs Quick reference data[1] CPD is used to determine the dynamic power dissipation (PDin μW). =CPD× VCC2×fi+∑(CL× VCC2×fo) where:= input frequency in MHz;= output frequency in MHz;(CL× VCC2×fo)= sum of outputs;= output load capacitance inpF;
VCC= supply voltage in Volts.
Ordering information
Table 1: Quick reference dataGND=0 V; Tamb =25 °C; tr=tf≤ 3.0ns.
tPHL/tPLH propagation delay: A to Yn CL=50 pF; VCC= 3.3V 3.1 3.6 4.1 ns input capacitance VI =VCC or GND - 4 - pF output capacitance VI =VCC or GND - 6 - pF
CPD power dissipation capacitance[1] CL=50 pF; f=1 MHz - 48 - pF
Table 2: Ordering informationPCK351D SO24 plastic small outline package; 24 leads; body width 7.5 mm SOT137-1
PCK351DB SSOP24 plastic shrink small outline package; 24 leads; body width 5.3 mm SOT340-1
Philips Semiconductors PCK351
1:10 clock distribution device with 3-State outputs Pinning information
5.1 Pinning
5.2 Pin description
Table 3: Pin descriptionGND 1, 7, 8, 12, 13, 17, 20, 24 ground (0V)
Y10 to Y1 2, 4, 9, 11, 14, 16, 18, 19, 21, 23 outputs
VCC 3, 10, 15, 22 supply voltage 5 output enable input (Active-LOW) 6 data input
Philips Semiconductors PCK351
1:10 clock distribution device with 3-State outputs Functional description
6.1 Function table[1] H = HIGH voltage level;
L = LOW voltage level;
Z = high-impedance OFF-state.
6.2 Logic symbol
Table 4: Function table
Philips Semiconductors PCK351
1:10 clock distribution device with 3-State outputs
6.3 Logic diagram
Philips Semiconductors PCK351
1:10 clock distribution device with 3-State outputs Limiting values[1] Stresses beyond those listed may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated
under ‘recommended operating conditions’ is not implied. Exposure to absolute-maximum-rated
conditions for extended periods may affect device reliability.
[2] The performance capability of a high-performance integrated circuit in conjunction with its thermal
environment can create junction temperatures which are detrimental to reliability. The maximum
junction temperature of this integrated circuit should not exceed 150°C.
[3] The input and output negative voltage ratings maybe exceededifthe input and output clamp currents
are observed.
Recommended operating conditions[1] Unused pins (input or I/O) must be held HIGH or LOW.
Table 5: Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).[1],[2]
VCC supply voltage range −0.5 +4.6 V input voltage range [3] −0.5 +7.0 V output voltage range [3] −0.5 +3.6 V
IIK input clamp current VI <0V - −18 mA
IOK output clamp current VI <0V - −50 mA output sink current - 64 mA
ICC, IGND VCC or GND current - ±75 mA
Tstg storage temperature −65 +150 °C
SO package Tamb= +55°C - 0.65 W
SSOP package Tamb= +55°C - 1.7 W
Table 6: Recommended operating conditionsSee note1.
VCC supply voltage 3.0 3.6 V
VIH HIGH-level input voltage 2.0 5.5 V input voltage 0 0.8 V
Tamb ambient temperature seeT able 7 “DC
characteristics”
and Table 8 “AC
characteristics”
per device
−40 +85 °C
tr, tf input rise and fall times VCC= 3.3 ±0.3V - 100 ns/V
Philips Semiconductors PCK351
1:10 clock distribution device with 3-State outputs Static characteristics[1] Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
Table 7: DC characteristicsOver recommended operating conditions; voltages are referenced to GND (ground=0 V). Tamb =25 °C.
VIK input diode voltage VCC= 3.0 V; II= −18 mA - - −1.2 V
VOH HIGH-level output voltage VCC= 3.0 V; IOH= −32 mA 2.0 - - V
VOL LOW-level output voltage VCC= 3.0 V; IOL=32 mA - - 0.5 V
ILI input leakage current VCC= 3.6 V; VI= GNDor 5.5V - - ±1.0 μA
ILO output leakage current VCC= 3.6 V; VO= 2.5V −15 - −150 mA
IOZ 3-State output OFF-state
current
VCC= 3.6 V; VO =3V [1] -- ±10 μA
ICC quiescent supply current VCC= 3.6V;VI =VCCor GND;IO =0;
outputs HIGH - 0.3 mA
VCC= 3.6V;VI =VCCor GND;IO =0;
outputs LOW - 25 mA
VCC= 3.6V;VI =VCCor GND;IO =0;
outputs disabled - 0.3 mA input capacitance VCC= 3.3 V; VI =VCC or GND;
f=10MHz -pF output capacitance VCC= 3.3 V; VO =VCC or GND;
f=10MHz -pF
Philips Semiconductors PCK351
1:10 clock distribution device with 3-State outputs
10. Dynamic characteristics[1] These data were extracted from characterization material and are not tested at the factory.
[2] ΔtPLH(T) and ΔtPHL(T) are virtually independent of VCC.
[3] ΔtPLH(V) and ΔtPHL(V) are virtually independent of temperature.
Table 8: AC characteristicsGND=0 V; tr =tf≤ 3.0 ns.
VCC= 3.3 V; Tamb =25°C
tPLH/tPHL propagation delay A to Yn CL=50 pF; see Figures5 and8 3.1 3.6 4.1 ns
tPZH/tPZL propagation delay OE to Yn CL=50 pF; see Figures6 and8 1.8 3.8 5.5 ns
tPHZ/tPLZ propagation delay OE to Yn CL=50 pF; see Figures6 and8 1.8 4.0 5.9 ns
tsk(o) output-to-output skew A to Yn CL=50 pF; see Figures7 and8 - 0.3 0.5 ns
tsk(p) pulse skew A to Yn CL=50 pF; see Figures7 and8 - 0.2 0.8 ns
tsk(pr) part-to-part skew A to Yn CL=50 pF; see Figures7 and8 --1 ns rise time A to Yn CL=50 pF; see Figures5 and8 ---ns fall time A to Yn CL=50 pF; see Figures5 and8 ---ns
VCC= 3.3to 3.6 V; Tamb =0°C
to +70°C
tPLH/tPHL propagation delay A to Yn CL=50 pF; see Figures5 and8 ---ns
tPZH/tPZL propagation delay OE to Yn CL=50 pF; see Figures6 and8 1.3 - 5.9 ns
tPHZ/tPLZ propagation delay OE to Yn CL=50 pF; see Figures6 and8 1.7 - 6.3 ns
tsk(o) output-to-output skew A to Yn CL=50 pF; see Figures7 and8 - - 0.5 ns
tsk(p) pulse skew A to Yn CL=50 pF; see Figures7 and8 - - 0.8 ns
tsk(pr) part-to-part skew A to Yn CL=50 pF; see Figures7 and8 --1 ns rise time A to Yn CL=50 pF; see Figures5 and8 - - 1.5 ns fall time A to Yn CL=50 pF; see Figures5 and8 - - 1.5 ns
Table 9: Switching characteristicsTemperature and VCC coefficients over recommended operating free-air temperature and VCC range; note1.
ΔtPLH(T) temperature coefficient of LOW-to-HIGH propagation delay A to Yn
(average value)
note2 65 ps/10°C
ΔtPHL(T) temperature coefficient of HIGH-to-LOW propagation delay A to Yn
(average value)
note2 45 ps/10°C
ΔtPLH(V) VCC coefficient of LOW-to-HIGH propagation delay A to Yn
(average value)
note3 −140 ps/100 mV
ΔtPHL(V) VCC coefficient of HIGH-to-LOW propagation delay A to Yn
(average value)
note3 −120 ps/100 mV
Philips Semiconductors PCK351
1:10 clock distribution device with 3-State outputs
10.1 AC waveforms
