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PCF8575TS
Remote 16-bit I/O expander for I2C-bus
Philips Semiconductors Product specification
Remote 16-bit I/O expander for I2 C-bus PCF8575
CONTENTS FEATURES GENERAL DESCRIPTION ORDERING INFORMATION BLOCK DIAGRAM PINNING CHARACTERISTICS OF THE I2 C-BUS
6.1 Bit transfer
6.2 START and STOP conditions
6.3 System configuration
6.4 Acknowledge FUNCTIONAL DESCRIPTION
7.1 Quasi-bidirectional I/Os
7.2 Addressing
7.3 Reading from a port (input mode)
7.4 Writing to the port (output mode)
7.5 Interrupt LIMITING VALUES HANDLING CHARACTERISTICS I2 C-BUS TIMING CHARACTERISTICS DEVICE PROTECTION PACKAGE OUTLINE SOLDERING
14.1 Introduction to soldering surface mount
packages
14.2 Reflow soldering
14.3 Wave soldering
14.4 Manual soldering
14.5 Suitability of surface mount IC packages for
wave and reflow soldering methods DEFINITIONS LIFE SUPPORT APPLICATIONS PURCHASE OF PHILIPS I2 C COMPONENTS
Philips Semiconductors Product specification
Remote 16-bit I/O expander for I2 C-bus PCF8575
FEATURES Operating supply voltage 2.5to 5.5V Low standby current consumption of 10 μA maximumI2 C-bus to parallel port expander 400 kbits/s FAST I2 C-bus Open-drain interrupt output 16-bit remote I/O port for the I2 C-bus Compatible with most microcontrollers Latched outputs with high current drive capability for
directly driving LEDs Address by 3 hardware address pins for use of up to devices SSOP24 package.
GENERAL DESCRIPTIONThe PCF8575 is a silicon CMOS circuit. It provides general
purpose remote I/O expansion for most microcontroller
families via the two-line bidirectional bus (I2 C-bus).
The device consists of a 16-bit quasi-bidirectional port and
an I2 C-bus interface. The PCF8575 has a low current
consumption and includes latched outputs with high
current drive capability for directly driving LEDs. It also
possesses an interrupt line (INT) which can be connected
to the interrupt logic of the microcontroller. By sending an
interrupt signal on this line, the remote I/O can inform the
microcontroller if there is incoming data on its ports without
having to communicate via the I2 C-bus. This means that
the PCF8575 is an I2 C-bus slave transmitter/receiver.
Every data transmission from the PCF8575 must consist
of an even number of bytes, the first byte will be referred
to as P07to P00 and the second byte as P17to P10.
The third will be referred to as P07to P00 and so on.
ORDERING INFORMATION
Philips Semiconductors Product specification
Remote 16-bit I/O expander for I2 C-bus PCF8575
BLOCK DIAGRAM
Philips Semiconductors Product specification
Remote 16-bit I/O expander for I2 C-bus PCF8575
PINNING
Philips Semiconductors Product specification
Remote 16-bit I/O expander for I2 C-bus PCF8575 CHARACTERISTICS OF THE I2C-BUS
The I2 C-bus is for bidirectional, 2-line communication
between different ICs or modules. The two lines are a
serial data line (SDA) and a serial clock line (SCL). Both
lines must be connected to a positive supply via a pull-up
resistor when connected to the output stages of a device.
Data transfer may be initiated only when the bus is not
busy.
6.1 Bit transfer
One data bit is transferred during each clock pulse.
The data on the SDA line must remain stable during the
HIGH period of the clock pulse as changes in the data line
at this time will be interpreted as control signals
(see Fig.3).
6.2 START and STOP conditions
Both data and clock lines remain HIGH when the bus is not
busy. A HIGH-to-LOW transition of the data line, while the
clock is HIGH is defined as the START condition (S).
A LOW-to-HIGH transition of the data line while the clock
is HIGH is defined as the STOP condition P (see Fig.4).
6.3 System configuration
A device generating a message is a ‘transmitter’, a device
receiving the message is the ‘receiver’. The device that
controls the message is the ‘master’ and the devices which
are controlled by the master are the ‘slaves’ (see Fig.5).
6.4 Acknowledge
The number of data bytes transferred between the START
and the STOP conditions from transmitter to receiver is not
limited. Each byte of eight bits is followed by one
acknowledge bit. The transmitter must release the SDA
line before the receiver can send an acknowledge bit.
A slave receiver which is addressed must generate an
acknowledge after the reception of each byte. Also a
master must generate an acknowledge after the reception
of each byte that has been clocked out of the slave
transmitter. The device that acknowledges has to pull
down the SDA line during the acknowledge clock pulse, so
that the SDA line is stable LOW during the HIGH period of
the acknowledge related clock pulse, set-up and hold
times must be taken into account.
A master receiver must signal an end of data to the
transmitter by not generating an acknowledge after the
last byte that has been clocked out of the slave. This is
done by the master receiver by holding the SDA line HIGH.
In this event the transmitter must release the data line to
enable the master to generate a STOP condition.
Philips Semiconductors Product specification
Remote 16-bit I/O expander for I2 C-bus PCF8575
Philips Semiconductors Product specification
Remote 16-bit I/O expander for I2 C-bus PCF8575 FUNCTIONAL DESCRIPTION
7.1 Quasi-bidirectional I/Os
The PCF8575’s 16 ports (see Fig.7) are entirely independent and can be used either as input or output ports. Input data
is transferred from the ports to the microcontroller in the READ mode (see Fig.10). Output data is transmitted to the ports
in the WRITE mode (see Fig.9).
This quasi-bidirectional I/O can be used as an input or output without the use of a control signal for data direction. power-on the I/Os are HIGH. In this mode only a current source (IOH) to VDD is active. An additional strong pull-up to
VDD (IOHt) allows fast rising edges into heavily loaded outputs. These devices turn on when an output is written HIGH,
and are switched off by the negative edge of SCL. The I/Os should be HIGH before being used as inputs. After power-on
as all the I/Os are set HIGH all of them can be used as input. Any change in setting of the I/Os as either inputs or outputs
can be done with the write mode. Warning: If a HIGH is applied to an I/O which has been written earlier to LOW, a large
current (IOL) will flow to VSS. (see Characteristics note3).
7.2 Addressing
Figures8,9 and 10 show the address and timing diagrams. Before any data is transmitted or received the master must
send the address of the receiver via the SDA line. The first byte transmitted after the START condition carries the address
of the slave device and the read/write bit. The address of the slave device must not be changed between the START and
the STOP conditions. The PCF8575 acts as a slave receiver or a slave transmitter.
Philips Semiconductors Product specification
Remote 16-bit I/O expander for I2 C-bus PCF8575
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Philips Semiconductors Product specification
Remote 16-bit I/O expander for I2 C-bus PCF8575
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Philips Semiconductors Product specification
Remote 16-bit I/O expander for I2 C-bus PCF8575
7.3 Reading from a port (input mode)
All ports programmed as input should be set to logic1. read, the master (microcontroller) first addresses the
slave device after it receives the interrupt. By setting the
last bit of the byte containing the slave address to logic1
the read mode is entered. The data bytes that follow on the
SDA are the values on the ports.
If the data on the input port changes faster than the master
can read, this data may be lost.
7.4 Writing to the port (output mode)
To write, the master (microcontroller) first addresses the
slave device. By setting the last bit of the byte containing
the slave address to logic 0 the write mode is entered.
The PCF8575 acknowledges and the master sends the
first data byte for P07to P00. After the first data byte is
acknowledged by the PCF8575, the second data byte
P17to P10 is sent by the master. Once again the
PCF8575 acknowledges the receipt of the data after which
this 16-bit data is presented on the port lines.
The number of data bytes that can be sent successively is
not limited. After every two bytes the previous data is
overwritten.
The first data byte in every pair refers to Port0
(P07to P00), whereas the second data byte in every pair
refers to Port 1 (P17to P10), see Fig.11.
7.5 Interrupt
The PCF8575 provides an open-drain interrupt (INT)
which can be fed to a corresponding input of the
microcontroller (see Figs9,10 and 12). This gives these
chips a kind of a master function which can initiate an
action elsewhere in the system.
An interrupt is generated by any rising or falling edge of the
port inputs. After time tiv the signal INT is valid.
The interrupt disappears when data on the port is changed
to the original setting or data is read from or written to the
device which has generated the interrupt.
In the write mode the interrupt may become deactivated
(HIGH) on the rising edge of the write to port pulse. On the
falling edge of the write to port pulse the interrupt is
definitely deactivated (HIGH).
The interrupt is reset in the read mode on the rising edge
of the read from port pulse.
During the resetting of the interrupt itself any changes on
the I/Os may not generate an interrupt. After the interrupt
is reset any change in I/Os will be detected and transmitted
as an INT.
Philips Semiconductors Product specification
Remote 16-bit I/O expander for I2 C-bus PCF8575
