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PCA9551BS-PCA9551D-PCA9551PW
8-bit I2C LED driver with programmable blink rates
Product data sheet
Supersedes data of 2003 May 05
2004 Oct 01
Philips Semiconductors Product data sheet
PCA95518-bit I2 C LED driver with
programmable blink rates
FEATURES 8 LED drivers (on, off, flashing at a programmable rate) 2 selectable, fully programmable blink rates (frequency and duty
cycle) between 0.148 Hz and 38 Hz (6.74 and 0.026 seconds) Input/outputs not used as LED drivers can be used as regular
GPIOs Internal oscillator requires no external components I2C-bus interface logic compatible with SMBus Internal power-on reset Noise filter on SCL/SDA inputs Active-LOW reset input 8 open drain outputs directly drive LEDs to 25 mA Edge rate control on outputs No glitch on power-up Supports hot insertion Low stand-by current Operating power supply voltage range of 2.3 V to 5.5 V 0 to 400 kHz clock frequency ESD protection exceeds 2000 V HBM per JESD22-A114,
150 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101 Latch-up testing is done to JESDEC Standard JESD78 which
exceeds 100 mA Packages offered: SO16, TSSOP16, HVQFN16
DESCRIPTIONThe PCA9551 LED Blinker blinks LEDs in I2 C-bus and SMBus
applications where it is necessary to limit bus traffic or free up the2 C Master’s (MCU, MPU, DSP, chipset, etc.) timer. The uniqueness
of this device is the internal oscillator with two programmable blink
rates. To blink LEDs using normal I/O Expanders like the PCF8574
or PCA9554, the bus master must send repeated commands to turn
the LED on and off. This greatly increases the amount of traffic on
the I2C-bus and uses up one of the master’s timers. The PCA9551
LED Blinker instead requires only the initial set up command to
program BLINK RATE 1 and BLINK RATE 2 (i.e., the frequency and
duty cycle) for each individual output. From then on, only one
command from the bus master is required to turn each individual
open drain output ON, OFF, or to cycle at BLINK RATE 1 or BLINK
RATE 2. Maximum output sink current is 25 mA per bit and 100 mA
per package.
Any bits not used for controlling the LEDs can be used for General
Purpose Parallel Input/Output (GPIO) expansion.
The active-LOW hardware reset pin (RESET) and Power-On Reset
(POR) initializes the registers to their default state, all zeroes,
causing the bits to be set HIGH (LED off).
Three hardware address pins on the PCA9551 allow eight devices
to operate on the same bus.
ORDERING INFORMATIONStandard packing quantities and other packaging data are available at www.standardproducts.philips.com/packaging.
I2C is a trademark of Philips Semiconductors Corporation.
Philips Semiconductors Product data sheet
PCA95518-bit I2 C LED driver with programmable blink rates
PIN CONFIGURATION — SO, TSSOP
Figure 1. Pin configuration — SO, TSSOP
PIN CONFIGURATION — HVQFN
Figure 2. Pin configuration — HVQFN
PIN DESCRIPTION
Philips Semiconductors Product data sheet
PCA95518-bit I2 C LED driver with programmable blink rates
BLOCK DIAGRAM
Figure 3. Block diagram
Philips Semiconductors Product data sheet
PCA95518-bit I2 C LED driver with programmable blink rates
DEVICE ADDRESSINGFollowing a START condition the bus master must output the
address of the slave it is accessing. The address of the PCA9551 is
shown in Figure 4. To conserve power, no internal pull-up resistors
are incorporated on the hardware selectable address pins and they
must be pulled HIGH or LOW.
Figure 4. Slave addressThe last bit of the address byte defines the operation to be
performed. When set to logic 1 a read is selected while a logic 0
selects a write operation.
CONTROL REGISTERFollowing the successful acknowledgement of the slave address,
the bus master will send a byte to the PCA9551 which will be stored
in the Control Register.
Figure 5. Control registerThe lowest 3 bits are used as a pointer to determine which register
will be accessed.
If the auto-increment flag is set, the three low order bits of the
Control Register are automatically incremented after a read or write.
This allows the user to program the registers sequentially. The
contents of these bits will rollover to ‘000’ after the last register is
accessed.
When auto-increment flag is set (AI = 1) and a read sequence is
initiated, the sequence must start by reading a register different from
‘0’ (B2 B1 B0 � 0 0 0)
Only the 3 least significant bits are affected by the AI flag.
Unused bits must be programmed with zeroes.
CONTROL REGISTER DEFINITION
REGISTER DESCRIPTION
INPUT — INPUT REGISTERThe INPUT register reflects the state of the device pins. Writes to
this register will be acknowledged but will have no effect.
NOTE: The default value “X” is determined by the externally appliedlogic level, normally ‘1’ when used for directly driving LED with
pull-up to VDD.
PSC0 — FREQUENCY PRESCALER 01PSC0 is used to program the period of the PWM output.
The period of BLINK0 � (PSC0 �1)
NOTE: Prescaler calculation is different between the PCA9551 and
other PCA955x LED Blinkers. A divider ratio of 38 instead of 44
is used. This different divider ratio causes the blinking frequency
to be 13% (1 – 38/44) lower when the same 8-bit word is used.
The programmed value of the FREQUENCY PRESCALER must
be adjusted to compensate for this difference in applications
where the PCA9551 is used in conjunction with other PCA955x
LED Blinkers and the observed blinking frequencies need to be
the same.
PWM0 — PWM REGISTER 0The PWM0 register determines the duty cycle of BLINK0. The
outputs are HIGH (LED off) when the count is less than the value in
PWM0 and HIGH when it is greater. If PWM0 is programmed with
00h, then the PWM0 output is always LOW.
The duty cycle of BLINK0 is: 256– PWM0
256
Philips Semiconductors Product data sheet
PCA95518-bit I2 C LED driver with programmable blink rates
PSC1 — FREQUENCY PRESCALER 11PSC1 is used to program the period of PWM output.
The period of BLINK1 � (PSC1 �1)
NOTE: Prescaler calculation is different between the PCA9551 and
other PCA955x LED Blinkers. A divider ratio of 38 instead of 44
is used. This different divider ratio causes the blinking frequency
to be 13% (1 – 38/44) lower when the same 8-bit word is used.
The programmed value of the FREQUENCY PRESCALER must
be adjusted to compensate for this difference in applications
where the PCA9551 is used in conjunction with other PCA955x
LED Blinkers and the observed blinking frequencies need to be
the same.
PWM1 — PWM REGISTER 1The PWM1 register determines the duty cycle of BLINK1. The
outputs are LOW (LED off) when the count is less than the value in
PWM1 and HIGH when it is greater. If PWM1 is programmed with
00h, then the PWM1 output is always LOW (LED off).
The duty cycle of BLINK1 is: 256– PWM1
LS0 — LED0–3 SELECTOR
LS1 — LED4–7 SELECTOR
The LSx LED select registers determine the source of the LED data.
00 = Output is set LOW (LED on)
01 = Output is set Hi-Z (LED off – default)
10 = Output blinks at PWM0 rate
11 = Output blinks at PWM1 rate
PINS USED AS GENERAL PURPOSE I/OsLED pins not used to control LEDs can be used as general purpose
I/Os.
For use as input: Set LEDx to high-impedance (01) and then read
the pin state via the input register.
For use as output: Connect external pull-up resistor to the pin and
size it according to the DC recommended operating characteristics.
LED output pin is HIGH when the output is programmed as
high-impedance, and LOW when the output is programmed LOW
through the “LED selector” register. The output can be pulse-width
controlled when PWM0 or PWM1 are used.
POWER-ON RESETWhen power is applied to VDD, an internal Power-On Reset holds
the PCA9551 in a reset condition until VDD has reached VPOR. At
this point, the reset condition is released and the PCA9551 registers
are initialized to their default states, all the outputs in the off state.
Thereafter, VDD must be lowered below 0.2 V to reset the device.
EXTERNAL RESETA reset can be accomplished by holding the RESET pin LOW for a
minimum of tW. The PCA9551 registers and I2 C state machine will
be held in their default state until the RESET input is once again
HIGH.
This input requires a pull-up resistor to VDD if no active connection is
used.
Philips Semiconductors Product data sheet
PCA95518-bit I2 C LED driver with programmable blink rates
CHARACTERISTICS OF THE I2 C-BUSThe I2 C-bus is for 2-way, 2-line communication between different ICs
or modules. The two lines are a serial data line (SDA) and a serial
clock line (SCL). Both lines must be connected to a positive supply
via a pull-up resistor when connected to the output stages of a device.
Data transfer may be initiated only when the bus is not busy.
Bit transferOne data bit is transferred during each clock pulse. The data on the
SDA line must remain stable during the HIGH period of the clock
pulse as changes in the data line at this time will be interpreted as
control signals (see Figure 6).
Figure 6. Bit transfer
Start and stop conditionsBoth data and clock lines remain HIGH when the bus is not busy. A
HIGH-to-LOW transition of the data line, while the clock is HIGH is
defined as the start condition (S). A LOW-to-HIGH transition of the
data line while the clock is HIGH is defined as the stop condition (P)
(see Figure 7).
System configurationA device generating a message is a transmitter: a device receiving
is the receiver. The device that controls the message is the master
and the devices which are controlled by the master are the slaves
(see Figure 8).
Figure 7. Definition of start and stop conditions
Figure 8. System configuration
Philips Semiconductors Product data sheet
PCA95518-bit I2 C LED driver with programmable blink rates
AcknowledgeThe number of data bytes transferred between the start and the stop conditions from transmitter to receiver is not limited. Each byte of eight bits
is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter whereas the master generates an
extra acknowledge related clock pulse.
A slave receiver which is addressed must generate an acknowledge after the reception of each byte. Also a master must generate an
acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that acknowledges has to pull down
the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW during the HIGH period of the acknowledge related clock
pulse, set-up and hold times must be taken into account.
A master receiver must signal an end of data to the transmitter by not generating an acknowledge on the last byte that has been clocked out of
the slave. In this event, the transmitter must leave the data line HIGH to enable the master to generate a stop condition.
Figure 9. Acknowledgement on the I2C-bus
Philips Semiconductors Product data sheet
PCA95518-bit I2 C LED driver with programmable blink rates
Bus transactions
Figure 10. WRITE to register
Figure 11. READ from register
NOTES:
Philips Semiconductors Product data sheet
PCA95518-bit I2 C LED driver with programmable blink rates
APPLICATION DATA
Figure 13. Typical application
Minimizing IDD when the I/O is used to control LEDsWhen the I/Os are used to control LEDs, they are normally connected to VDD through a resistor as shown in Figure 13. Since the LED acts as a
diode, when the LED is off the I/O VIN is about 1.2 V less than VDD. The supply current, IDD, increases as VIN becomes lower than VDD and is
specified as ΔIDD in the DC characteristics table.
Designs needing to minimize current consumption, such as battery power applications, should consider maintaining the I/O pins greater than or
equal to VDD when the LED is off. Figure 14 shows a high value resistor in parallel with the LED. Figure 15 shows VDD less than the LED supply
voltage by at least 1.2 V. Both of these methods maintain the I/O VIN at or above VDD and prevents additional supply current consumption when
the LED is off.
Figure 14. High value resistor in parallel with the LED
Figure 15. Device supplied by a lower voltage
Philips Semiconductors Product data sheet
PCA95518-bit I2 C LED driver with programmable blink rates
Programming exampleThe following example will show how to set LED0 to LED3 on. It will
then set LED4 and LED5 to blink at 1 Hz at a 50% duty cycle. LED6
and LED7 will be set to blink at 4 Hz and at a 25% duty cycle.
Table 1.
