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PCA9532PW
16-bit I2C LED dimmer
Product data
Supersedes data of 2003 Feb 26
2003 May 02
Philips Semiconductors Product data
PCA953216-bit I2 C LED dimmer
FEATURES 16 LED drivers (on, off, flashing at a programmable rate) 2 selectable, fully programmable blink rates (frequency and duty
cycle) between 0.625 and 160 Hz (6.4 seconds and
6.25 milliseconds) 256 brightness steps Input/outputs not used as LED drivers can be used as regular
GPIOs Internal oscillator requires no external components I2C-bus interface logic compatible with SMBus Internal power-on reset Noise filter on SCL/SDA inputs Active-LOW reset input 16 open drain outputs directly drive LEDs to 25 mA Controlled edge rates to minimize ground bounce No glitch on power-up Supports hot insertion Low stand-by current Operating power supply voltage range of 2.3 V to 5.5 V 0 to 400 kHz clock frequency ESD protection exceeds 2000 V HBM per JESD22-A114,
150 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101 Latch-up testing is done to JEDEC Standard JESD78 which
exceeds 100 mA Packages offered: SO24, TSSOP24, HVQFN24
DESCRIPTIONThe PCA9532 is a 16-bit I2C-bus and SMBus I/O expander
optimized for dimming LEDs in 256 discrete steps for
Red/Green/Blue (RGB) color mixing and back light applications.
The PCA9532 contains an internal oscillator with two user
programmable blink rates and duty cycles coupled to the output
PWM. The LED brightness is controlled by setting the blink rate high
enough (> 100 Hz) that the blinking cannot be seen and then using
the duty cycle to vary the amount of time the LED is on and thus the
average current through the LED.
The initial set-up sequence programs the two blink rates/duty cycles
for each individual PWM. From then on, only one command from the
bus master is required to turn individual LEDs ON, OFF, BLINK
RATE 1 or BLINK RATE 2. Based on the programmed frequency
and duty cycle, BLINK RATE 1 and BLINK RATE 2 will cause the
LEDs to appear at a different brightness or blink at periods up to
1.6 seconds. The open drain outputs directly drive the LEDs with
maximum output sink current of 25 mA per bit and 200 mA per
package (100 mA per octal).
To blink LEDs at periods greater than 1.6 seconds the bus master
(MCU, MPU, DSP, chipset, etc.) must send repeated commands to
turn the LED on and off as is currently done when using normal I/O
Expanders like the Philips PCF8575 or PCA9555. Any bits not used
for controlling the LEDs can be used for General Purpose Parallel
Input/Output (GPIO) expansion which provides a simple solution
when additional I/O is needed for ACPI power switches, sensors,
pushbuttons, alarm monitoring, fans, etc.
The active-LOW hardware reset pin (RESET) and Power-On Reset
(POR) initializes the registers to their default state, all zeroes,
causing the bits to be set HIGH (LED off).
Three hardware address pins on the PCA9532 allow eight devices
to operate on the same bus.
ORDERING INFORMATIONStandard packing quantities and other packaging data is available at www.philipslogic.com/packaging.
I2C is a trademark of Philips Semiconductors Corporation.
Philips Semiconductors Product data
PCA953216-bit I2 C LED dimmer
PIN CONFIGURATION — SO, TSSOP
Figure 1. Pin configuration — SO, TSSOP
PIN CONFIGURATION — HVQFN
Figure 2. Pin configuration — HVQFN
PIN DESCRIPTION
Philips Semiconductors Product data
PCA953216-bit I2 C LED dimmer
BLOCK DIAGRAM
Figure 3. Block diagram
Philips Semiconductors Product data
PCA953216-bit I2 C LED dimmer
DEVICE ADDRESSINGFollowing a START condition the bus master must output the
address of the slave it is accessing. The address of the PCA9532 is
shown in Figure 4. To conserve power, no internal pull-up resistors
are incorporated on the hardware selectable address pins and they
must be pulled HIGH or LOW.
Figure 4. Slave addressThe last bit of the address byte defines the operation to be
performed. When set to logic 1 a read is selected while a logic 0
selects a write operation.
CONTROL REGISTERFollowing the successful acknowledgement of the slave address,
the bus master will send a byte to the PCA9532 which will be stored
in the Control Register. This register can be read and written via the
I2C-bus.
Figure 5. Control register
CONTROL REGISTER DEFINITIONIf the auto-increment flag (AI) is set, the four low order bits of the
Control Register are automatically incremented after a read or write.
This allows the user to program the registers sequentially. The
contents of these bits will rollover to ‘0000’ after the last register is
accessed.
When auto-increment flag is set (AI = 1) and a read sequence is
initiated, the sequence must start by reading a register different from
‘0’ (B3 B2 B1 B0 � 0 0 0 0)
Only the 4 least significant bits are affected by the AI flag.
Unused bits must be programmed with zeroes.
INPUT0 — INPUT REGISTER 1The INPUT register 1 reflects the state of the device pins (inputs 0
to 7). Writes to this register will be acknowledged but will have no
effect.
INPUT1 — INPUT REGISTER 2The INPUT register 1 reflects the state of the device pins (inputs 8
to 15). Writes to this register will be acknowledged but will have no
effect.
PSC0 — FREQUENCY PRESCALER 0PSC0 is used to program the period of the PWM output.
The period of BLINK0 � (PSC0�1)
PWM0 — PWM REGISTER 0
The PWM0 register determines the duty cycle of BLINK0. The
outputs are LOW (LED on) when the count is less than the value in
PWM0 and HIGH (LED off) when it is greater. If PWM0 is
programmed with 00h, then the PWM0 output is always HIGH
(LED off).
The duty cycle of BLINK0 is: PWM0
PSC1 — FREQUENCY PRESCALER 1
PSC1 is used to program the period of PWM output.
The period of BLINK1 � (PSC1�1)
PWM1 — PWM REGISTER 1
The PWM1 register determines the duty cycle of BLINK1. The
outputs are LOW (LED on) when the count is less than the value in
PWM1 and HIGH (LED off) when it is greater. If PWM1 is
programmed with 00h, then the PWM1 output is always HIGH
Philips Semiconductors Product data
PCA953216-bit I2 C LED dimmer
LS0 — LED 0-3 SELECTOR
LS1 — LED 4-7 SELECTOR
LS2 — LED 8-11 SELECTOR
LS3 — LED 12-15 SELECTORThe LSx LED select registers determine the source of the LED data.
00 = Output is set Hi-Z (LED off - default)
01 = Output is set LOW (LED on)
10 = Output blinks at PWM0 rate
11 = Output blinks at PWM1 rate
Philips Semiconductors Product data
PCA953216-bit I2 C LED dimmer
POWER-ON RESETWhen power is applied to VDD, an internal Power-On Reset holds
the PCA9532 in a reset state until VDD has reached VPOR. At this
point, the reset condition is released and the PCA9532 registers are
initialized to their default states, all the outputs in the off state.
EXTERNAL RESETA reset can be accomplished by holding the RESET pin LOW for a
minimum of tW. The PCA9532 registers and I2C state machine will
be held in their default state until the RESET input is once again
HIGH.
This input requires a pull-up resistor to VDD.
CHARACTERISTICS OF THE I2 C-BUSThe I2C-bus is for 2-way, 2-line communication between different ICs
or modules. The two lines are a serial data line (SDA) and a serial
clock line (SCL). Both lines must be connected to a positive supply
via a pull-up resistor when connected to the output stages of a device.
Data transfer may be initiated only when the bus is not busy.
Bit transferOne data bit is transferred during each clock pulse. The data on the
SDA line must remain stable during the HIGH period of the clock
pulse as changes in the data line at this time will be interpreted as
control signals (see Figure 6).
Figure 6. Bit transfer
Start and stop conditionsBoth data and clock lines remain HIGH when the bus is not busy. A
HIGH-to-LOW transition of the data line, while the clock is HIGH is
defined as the start condition (S). A LOW-to-HIGH transition of the
data line while the clock is HIGH is defined as the stop condition (P)
(see Figure 7).
System configurationA device generating a message is a transmitter: a device receiving
is the receiver. The device that controls the message is the master
and the devices which are controlled by the master are the slaves
(see Figure 8).
Figure 7. Definition of start and stop conditions
Philips Semiconductors Product data
PCA953216-bit I2 C LED dimmer
Figure 8. System configuration
AcknowledgeThe number of data bytes transferred between the start and the stop conditions from transmitter to receiver is not limited. Each byte of eight bits
is followed by one acknowledge bit. The acknowledge bit is a HIGH-level put on the bus by the transmitter whereas the master generates an
extra acknowledge related clock pulse.
A slave receiver which is addressed must generate an acknowledge after the reception of each byte. Also a master must generate an
acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that acknowledges has to pull down
the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW during the HIGH period of the acknowledge related clock
pulse, set-up and hold times must be taken into account.
A master receiver must signal an end of data to the transmitter by not generating an acknowledge on the last byte that has been clocked out of
the slave. In this event, the transmitter must leave the data line HIGH to enable the master to generate a stop condition.
Figure 9. Acknowledgement on the I2C-bus
Philips Semiconductors Product data
PCA953216-bit I2 C LED dimmer
Bus transactions
Figure 10. WRITE to register
Figure 11. READ from register
NOTE:
Philips Semiconductors Product data
PCA953216-bit I2 C LED dimmer
APPLICATION DATA
Figure 13. Typical application
Minimizing IDD when the I/O is used to control LEDsWhen the I/Os are used to control LEDs, they are normally connected to VDD through a resistor as shown in Figure 13. Since the LED acts as a
diode, when the LED is off the I/O VIN is about 1.2 V less than VDD. The supply current, IDD, increases as VIN becomes lower than VDD and is
specified as ∆IDD in the DC characteristics table.
Designs needing to minimize current consumption, such as battery power applications, should consider maintaining the I/O pins greater than or
equal to VDD when the LED is off. Figure 14 shows a high value resistor in parallel with the LED. Figure 15 shows VDD less than the LED supply
voltage by at least 1.2 V. Both of these methods maintain the I/O VIN at or above VDD and prevents additional supply current consumption when
the LED is off.
Figure 14. High value resistor in parallel with the LED
Figure 15. Device supplied by a lower voltage
