PCA9527DP ,3-channel bidirectional bus extender for HDMI, I2C-bus and SMBusfeatures as the SDAA and SCLA, butit does not have the rise time accelerator and is powered and ref ..
PCA9530DP ,2-bit I2C-bus LED dimmerapplications.The PCA9530 contains an internal oscillator with two user programmable blink rates and ..
PCA9531 ,8-bit I2C LED dimmer
PCA9531D ,8-bit I2C-bus LED dimmer
PCA9531PW ,8-bit I2C-bus LED dimmerapplications.The PCA9531 contains an internal oscillator with two user programmable blink rates and ..
PCA9532BS ,16-bit I2C-bus LED dimmerapplications.The PCA9532 contains an internal oscillator with two user programmable blink rates and ..
PEMB1 ,PNP resistor-equipped transistors R1 = 22kOhm/R2 = 22kOhmLIMITING VALUESIn accordance with the Absolute Maximum Rating System (IEC 60134).SYMBOL PARAMETER C ..
PEMB13 ,PNP/PNP resistor-equipped transistors; R1 = 4.7 k惟, R2 = 47 k惟
PEMB18 ,PEMB18; PUMB18; PNP/PNP resistor-equipped transistors; R1 = 4.7 kOhm, R2 = 10 kOhmapplications1.4 Quick reference dataTable 2: Quick reference dataSymbol Parameter Conditions Min Ty ..
PEMB19 ,PNP/PNP resistor-equipped transistors; R1 = 22 kOhm, R2 = openapplications1.4 Quick reference dataTable 2: Quick reference dataSymbol Parameter Conditions Min Ty ..
PEMB3 ,PNP resistor-equipped double transistor R1 = 4.7 kOhm, R2 = openLIMITING VALUESIn accordance with the Absolute Maximum Rating System (IEC 60134).SYMBOL PARAMETER C ..
PEMB30 ,PNP/PNP double resistor-equipped transistors; R1 = 2.2 kOhm, R2 = openApplicationsn Low current peripheral driver n Cost-saving alternative for BC857BSand BC857BVn Contr ..
PCA9527DP
3-channel bidirectional bus extender for HDMI, I2C-bus and SMBus
General descriptionThe PCA9527 is a 3-channel bidirectional open-drain bus buffer for Display Data Control
(DDC) clock, data and Consumer Electronic Control (CEC) for HDMI application. The
device has two power supply pins to allow voltage level shift from 2.7 V to 5 V, and a
rise time acceleratoron portAof each DDC clock and datafor driving longer cable (upto meters or 1400 pF reliably without violating the bus rise time). The 5 V tolerant CEC
channel is internally connected to VCC(B) and has no rise time accelerator. The CEC
channel can be used as an interrupt or reset.
While retaining all the operating modes and features of the I2 C-bus system during the
level shift, it also permits extension of the I2 C-bus by providing bidirectional buffering for
data (SDA), clock (SCL), and CEC. Using the PCA9527 enables the system designer to
isolate bus capacitanceto meet HDMI DDC version 1.3 distance specification. The SDAx
and SCLx pins are overvoltage tolerant and are high-impedance when the PCA9527 is
unpowered. The portB drivers (SDAB, SCLB, CECB) with static level offset behave much
like the drivers on the PCA9515 device, while the SDAA and SCLA drivers integrate the
rise time accelerator, sink more current and eliminate the static offset voltage. The CECA
driver has the same current and static offset voltage featuresas the SDAA and SCLA, but
it does not have the rise time accelerator and is powered and referenced to VCC(B). This
resultsina LOWon the portB translating intoa nearly0V LOWon portA, providing zero
offset. The static level offset design of the port B I/O drivers prevent them from being
connected to another device that has rise time accelerator including the PCA9507
(port B), PCA9510, PCA9511, PCA9512, PCA9513, PCA9514, PCA9515, PCA9516A,
PCA9517 (port B), or PCA9518A. Port A of two or more PCA9527s can be connected
together, however, to allow a star topography with port A on the common bus, and portA
canbe connected directlyto any other buffer with staticor dynamic offset voltage. Multiple
PCA9527s can be connected in series, port A to port B, with no build-up in offset voltage
with only time of flight delays to consider. Rise time accelerators on the SDAA and SCLA
pins are turnedon when input thresholdis above 0.3VCC(A). The PCA9527 SDA and SCL
drivers are not enabled unless VCC(A) and VCC(B) are above 2.7V. The EN pin can alsobe
used to turn the drivers on and off under system control. Caution should be observed to
only change the state of the enable pin when the bus is idle. The output pull-down on the
port B internal buffer LOW is set for approximately 0.5 V, while the input threshold of the
internal buffer is set about 70 mV lower (0.43 V). When the port B I/O is driven LOW
internally, the LOW is not recognized as a LOW by the input. This prevents a lock-up
condition from occurring.
PCA9527
3-channel bidirectional bus extender for HDMI, I2 C-bus and
SMBus
Rev. 01 — 29 June 2009 Product data sheet
NXP Semiconductors PCA9527
3-channel bidirectional bus extender for HDMI, I2 C-bus and SMBus Features 3-channel, bidirectional buffer isolates capacitance allowing 1400 pF on port A and
400 pF on portB Exceeds 18 meters (above the maximum distance for HDMI DDC) Rise time accelerator and normal I/O on port A (no accelerator for CEC) Static level offset on portB Voltage level translation from 2.7 V to 5.5V CEC is 5 V tolerant, powered by VCC(B) Upgrade replacement over PCA9507 and PCA9517A for cable applicationI2 C-bus, SMBus and DDC-bus compatible Active HIGH buffer enable input Open-drain input/outputs Lock-up free operation Supports arbitration and clock stretching across the repeater Accommodates Standard-mode and Fast-mode I2 C-bus devices and multiple masters Powered-off high-impedance I2 C-bus pins Port A operating supply voltage range of 2.7 V to 5.5V Port B operating supply voltage range of 2.7 V to 3.6V5 V tolerant I2 C-bus and enable pins0 Hz to 400 kHz clock frequency (the maximum system operating frequency may be
less than 400 kHz because of the delays added by the repeater) ESD protection exceeds 8000 V HBM per JESD22-A114, 500 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101 Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA Package offered: TSSOP10
Ordering information[1] Also known as MSOP10.
Table 1. Ordering informationPCA9527DP 9527 TSSOP10[1] plastic thin shrink small outline package; leads; body width3 mm
SOT552-1
NXP Semiconductors PCA9527
3-channel bidirectional bus extender for HDMI, I2 C-bus and SMBus Functional diagram Pinning information
5.1 Pinning
5.2 Pin description
Table 2. Pin descriptionVCC(A) 1 port A supply voltage (2.7 V to 5.5V)
SCLA 2 serial clock port A bus with rise time accelerator for DDC line or cable,V tolerant
SDAA 3 serial data port A bus with rise time accelerator for DDC line or cable,V tolerant
CECA 4 serial data with normal I/O powered by VCC(B), 5 V tolerant
NXP Semiconductors PCA9527
3-channel bidirectional bus extender for HDMI, I2 C-bus and SMBus Functional descriptionRefer to Figure 1 “Functional diagram of PCA9527”.
The PCA9527 consistsof3 channelsof bidirectional open-drain I/Os specifically designed
to support up-translation/down-translation between low voltages (as low as 2.7 V) and a
3.3 V or 5 V I2 C-bus and SMBus. The device contains a rise time accelerator, specifically portAof the SCLA and SDAA that enables the deviceto drivea long cableora heavier
capacitive load for DDC, I2 C-bus and SMBus applications. With dual supply rails, the
device translates from voltage ranges 2.7 V to 5.5 V down to a voltage as low as 2.7V
without degradation of system performance. Unlike the SDAA and SCLA, the CECA is
powered by the VCC(B) and does not have a rise time accelerator, but is similar in that its
port A has normal I/O and port B static level offset. All I/Os are overvoltage tolerant to
5.5 V even when the device is un-powered (VCC(B) and/or VCC(A)=0 V).
The PCA9527 includes a power-up circuit that keeps the SDA and SCL output drivers
turned off until VCC(A) and VCC(B) rise above 2.7 V. The CECA output drivers are turned
OFF until VCC(B) rises above 2.7 V. VCC(A) and VCC(B) can be applied in any sequence at
power-up.
When port B falls first and goes below 0.3VCC(B) the port A driver is turned on and portA
pulls down to 0V . As port A falls below 0.3VCC(A) the port B pulls down to about 0.5V.
The external port B driver must drive the port B to a LOW that is≤ 0.4 V or else it is not
possibleto know whois driving the portA LOW. The PCA9527 direction control assumes
that port A is controlling the part unless port B falls below 0.4 V. When the port B voltage≤ 0.4 V the port A driver of the PCA9527 is on and holds port A down to nearly 0 V. As
the portB voltage rises because the external driver turns off, the portB voltage risesupto
~0.5 V because port A is LOW; once port B rises to ~0.5 V the port A pull-down driver
turns off. Then port A rises with a rise time determined by the RC of port A when it
GND 5 supply ground (0V) 6 active HIGH buffer enable input
CECB 7 serial data with static level offset, powered by VCC(B), 5V tolerant
SDAB 8 serial data port B bus with static level offset, 5V tolerant
SCLB 9 serial clock port B bus with static level offset, 5V tolerant
VCC(B) 10 port B supply voltage (2.7 V to 3.6V)
Table 2. Pin description …continued
NXP Semiconductors PCA9527
3-channel bidirectional bus extender for HDMI, I2 C-bus and SMBuscrosses the portA threshold ~0.3VCC(A) the portB driveris turnedoff and the rising edge
accelerator is turned on, which causes a faster rising edge until it reaches the turn-off
pointfor the rising edge accelerator ~0.7VCC(A). Thenit continuesto riseat the slower rate
determinedby the RCof portA. When the portB driver turns off, portB rises with the RC
of portB.
VCC(A) powers the 0.3VCC(A) reference for SCLA and SDAA as well as the port A power
good detect circuit. VCC(B) powers the rest of the chip including the port B I/Os, the CEC
I/Os, and the support functions. Figure 3 illustrates the threshold and I/O levels for portA
and portB.
6.1 EnableThe EN pin is active HIGH with an internal ~100 kΩ pull-up to VCC(B) and allows the user
to select when the buffer is active. The enable pin puts the PCA9527 in a power-down
state whenitis disabled,so that thereisa recovery delay anda lower power-down power.
This can be used to isolate the line when the HDMI DDC transmitter or receiver is not
ready,or froma badly behaved slaveon power-up until after the system power-up reset.It
should never change state during an I2 C-bus operation because disabling during a bus
operation will hang the bus and enabling part way through a bus cycle could confuse the2 C-bus parts being enabled. The enable pin should only change state when the global
bus and the buffer port are in an idle state to prevent system failures.
6.2 Rise time acceleratorsPCA9527 has rise time accelerators on port A of SCL and SDA only; the CECA pin does
not have a rise time accelerator. During port A positive bus transitions a current source is
switched on to quickly slew the SDAA and SCLA lines HIGH once the input level of
0.3VCC(A) is exceeded for the PCA9527 and turns off as the 0.7VCC(A) voltage is
approached.
6.3 Resistor pull-up value selection
6.3.1 Port A (SDAA and SCLA)SDAA and SCLA are open-drain I/O that have rise time accelerators and strong pull-down.
When the inputs transition above 0.3VCC(A), the rise time accelerator activates and boosts
the pull-up current during rising edgeto meet theI2 C-bus rise time specification when the
device drivesa long cableor heavier capacitance load. The strong pull-down enables the
outputto driveto nearly zero voltagefor logic LOW. The selection for pull-up resistors are
defined in the HDMI DDC specification shown in Table 3. For HDMI transmitter
applications like digital video player, recorder, or set-top box, the pull-up resistor is in the
rangeof 1.5 kΩto2 kΩ. For HDMI receiver applications likein LCD TVor video card, the
pull-up resistor is 47 kΩ on the SCLA line, and there is no pull-up on the SDAA line.
Please refer to Table3, Figure 6 and Figure 7 for more details. Figure 4 shows the portA
pull-up resistor values (in kΩ) versus capacitance load (in nF) for 5 V supply voltage
complied with 1 μs rise time per I2 C-bus Standard-mode specification. The graph
contrastsa shaded and unshaded region. Any resistor value chosen within the unshaded
region would comply with 1 μs rise time, while any value chosen in the shaded region
would not.
NXP Semiconductors PCA9527
3-channel bidirectional bus extender for HDMI, I2 C-bus and SMBus
6.3.2 Port A (CECA)CECA does not have a rise time accelerator, but has a standard open-drain I/O. In
addition to incurring no offset voltage, it has edge rate control and a lower capacitance
than those of standard discrete MOSFET, and isolates the input/output capacitance. It is
designed for a lower speed channel for consumer electronic control (less than 10 kHz) or
general purpose interrupt or reset over long cable.
CECA does not have internal pull-up. The pull-up resistor is calculated using standard2 C-bus pull-up resistor formula,as shownin Section 6.3.3 “PortB (SDAB, SCLB, CECB)”.
Table 3. HDMI DDC pull-up resistors specificationSDAA at the source (DVD/STB) 1.5kΩ 2.0kΩ
at the sink (LCD TV) - -
SCLA at the source (DVD/STB) 1.5kΩ 2.0kΩ
at the sink (LCD TV) 47 kΩ±10%
NXP Semiconductors PCA9527
3-channel bidirectional bus extender for HDMI, I2 C-bus and SMBus
6.3.3 Port B (SDAB, SCLB, CECB)SDAB and SCLB are standard I2 C-bus with static level offset that has no rise time
accelerator. The static level offset produces an output LOW of 0.5 V (typical) at 6 mA. As
with the standardI2 C-bus system, pull-up resistors are requiredto provide the logic HIGH
levels. The sizeof these pull-up resistors dependson the system requirement, and should
meet the current sinking capability of the device that drives the buffer, as well as that of
the buffer. The minimum and maximum pull-up resistors are determined and the pull-up
resistor’s value is chosen to be within the minimum and maximum range.
Using Equation 1, calculate the minimum pull-up resistor value:
(1)
Where:
RPU(min) is the minimum pull-up resistor value for the open-drain SCLB and SDAB.
Vpu(max) is the maximum supply rail of the pull-up resistor and should not exceed 5.5V.
0.4 V is the maximum VOL of the device that drives the buffer on logic LOW.
IOL(max) at VOL= 0.4 V is the maximum sink current of the device that drives the buffer
on logic LOW.
The maximum pull-up resistor should alsobe sized such that the RC time constant meets
the standard I2 C-bus rise time, which is 1 μs for Standard-mode (100 kHz) or 300 ns for
Fast-mode (400 kHz). DDC bus complies with the I2 C-bus Standard-mode and operates
below 100 kHz, and maximum rise time is 1 μs using a simplified RC equation.
Using Equation 2, calculate the maximum pull-up resistor value:
(2)
Where:
RPU(max) is the maximum allowable pull-up resistor on the SCLB and SDAB in order to
meet the I2 C-bus rise time specification.
CL(max) is the maximum allowable capacitance load (include the capacitance of driver,
the line, and the buffer) in order to meet the rise time specification.is the rise time specifiedas1μs (for bus speed 100 kHzor lower) and 300ns (for bus
speed 400 kHz or lower).
The chosen pull-up resistor RPU is: RPU(min)≤ RPU≤ RPU(max).PU max() CL max()× 1.2tr×=
NXP Semiconductors PCA9527
3-channel bidirectional bus extender for HDMI, I2 C-bus and SMBus Application design-in informationA typical application is shown in Figure 5. In this example, the system master is running
on a 3.3 V I2 C-bus while the slave is connected to a 5 V bus. Both buses run at 400 kHz.
Master devices can be placed on either bus. HDMI DDC applications for DVD/R and
LCD TV are shown in Figure 6 and Figure 7, respectively. In these applications the HDMI
transmitteror receiveris 3.3V, while the DDC lineis5V, PCA9527 behaves likea voltage
level shift,a buffer and long cable bus extenderto ensure signal integrityfor accessing the
EDID on the DDC line.
NXP Semiconductors PCA9527
3-channel bidirectional bus extender for HDMI, I2 C-bus and SMBusAccording to Figure 5, when port A of the PCA9527 is pulled LOW by a driver on the2 C-bus, a comparator detects the falling edge when it goes below 0.3VCC(A) and causes
the internal driver on port B to turn on, causing port B to pull down to about 0.5 V. When
port B of the PCA9527 falls, first a CMOS hysteresis type input detects the falling edge
and causes the internal driveron portAto turnon and pull the portA pin downto ground.
In order to illustrate what would be seen in a typical application, refer to Figure 11 and
Figure 12.
If the bus master in Figure 5 were to write to the slave through the PCA9527, waveforms
shown in Figure 11 would be observed on the A bus. This looks like a normal I2 C-bus
transmission except that the HIGH level may be as low as 2.7 V, and the turn on and turn
off of the acknowledge signals are slightly delayed.
The master drives theB busto groundor letsit floatto VCC(B)asit sends datato the slave
at the falling edge of the 8th clock, master releases SDAB on the B bus and slave pulls
SDAA on the A bus to ground, causing the PCA9527 to pull SDAB on the B bus to 0.5V.
At the falling edge of the 9th clock, the master again drives the B bus and slave releases
the A bus.
Multiple PCA9527 port A sides can be connected in a star configuration (Figure 8),
allowing all nodes to communicate with each other.
Multiple PCA9527s can be connected in series (Figure 9) as long as port A is connected
to port B. I2 C-bus slave devices can be connected to any of the bus segments. The
number of devices that can be connected in series is limited by repeater
delay/time-of-flight considerations on the maximum bus speed requirements.
NXP Semiconductors PCA9527
3-channel bidirectional bus extender for HDMI, I2 C-bus and SMBus
NXP Semiconductors PCA9527
3-channel bidirectional bus extender for HDMI, I2 C-bus and SMBus
