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PCA9509D-PCA9509DP-PCA9509GM
Level translating I虏C-bus/SMBus repeater
1. General descriptionThe PCA9509 is a level translating I2 C-bus/SMBus repeater that enables processor low
voltage 2-wire serial bus to interface with standard I2 C-bus or SMBus I/O. While retaining
all the operating modes and features of the I2 C-bus system during the level shifts, it also
permits extension of the I2 C-bus by providing bidirectional buffering for both the data
(SDA) and the clock (SCL) lines, thus enabling the I2 C-bus or SMBus maximum
capacitance of 400 pF on the higher voltage side. Port A allows a voltage range from
1.0 V (as low as 0.95 V in special cases) to VCC(B) 1.0 V and requires no external pull-up
resistors due to the internal current source. Port B allows a voltage range from 3.0 V to
5.5 V and is overvoltage tolerant. Both port A and port B SDA and SCL pins are
high-impedance when the PCA9509 is unpowered.
The bus port B drivers are compliant with SMBus I/O levels, while port A uses a current
sensing mechanism to detect the input or output LOW signal which prevents bus lock-up.
Port A uses a 1 mA current source for pull-up and a 200 pull-down driver. This results in
a LOW on the port A accommodating smaller voltage swings. The output pull-down on the
port A internal buffer LOW is set for approximately 0.2 V, while the input threshold of the
internal buffer is set about 50 mV lower than that of the output voltage LOW. When the
port A I/O is driven LOW internally, the LOW is not recognized as a LOW by the input.
This prevents a lock-up condition from occurring. The output pull-down on the portB
drives a hard LOW and the input level is set at 0.3 of SMBus or I2 C-bus voltage level
which enables port B to connect to any other I2 C-bus devices or buffer.
The PCA9509 drivers are not enabled unless VCC(A) is above 0.8 V and VCC(B) is above
2.5 V. The enable (EN) pin can also be used to turn on and turn off the drivers under
system control. Caution should be observed to change only the state of the EN pin when
the bus is idle.
2. Features and benefits Bidirectional buffer isolates capacitance and allows 400 pF on port B of the device Voltage level translation from port A (1 V [0.95 V in special cases] to VCC(B) 1.0 V) to
port B (3.0 V to 5.5V) Requires no external pull-up resistors on lower voltage portA Active HIGH repeater enable input Open-drain inputs/outputs Lock-up free operation Supports arbitration and clock stretching across the repeater Accommodates Standard-mode and Fast-mode I2 C-bus devices and multiple masters Powered-off high-impedance I2 C-bus pins
PCA9509
Level translating I2 C-bus/SMBus repeater
Rev. 6 — 5 August 2013 Product data sheet
NXP Semiconductors PCA9509
Level translating I2 C-bus/SMBus repeater Operating supply voltage range of 1.0 V (0.95 V in special cases) to VCC(B) 1.0 V on
port A, 3.0 V to 5.5 V on portB5 V tolerant port B SCL, SDA and enable pins0 Hz to 400 kHz clock frequency
Remark: The maximum system operating frequency may be less than 400 kHz
because of the delays added by the repeater. ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per
JESD22-C101 Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA Packages offered: TSSOP8, SO8, XQFN8
3. Ordering information[1] ‘X’ changes based on date code.
3.1 Ordering options
Table 1. Ordering informationPCA9509D PCA9509 SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
PCA9509DP 9509 TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm SOT505-1
PCA9509GM P9X[1] XQFN8 plastic, extremely thin quad flat package; no leads; 8 terminals;
body 1.6 1.6 0.5 mm
SOT902-2
Table 2. Ordering optionsPCA9509D PCA9509D,112 SO8 Standard marking *IC’s tube
- DSC bulk pack
2000 Tamb= 40 Cto+85C
PCA9509D,118 SO8 Reel 13” Q1/T1
*standard mark SMD
2500 Tamb= 40 Cto+85C
PCA9509DP PCA9509DP ,118 TSSOP8 Reel 13” Q1/T1
*standard mark SMD
2500 Tamb= 40 Cto+85C
PCA9509GM PCA9509GM,125 XQFN8 Reel 7” Q3/T4
*standard mark
4000 Tamb= 40 Cto+85C
NXP Semiconductors PCA9509
Level translating I2 C-bus/SMBus repeater
4. Functional diagramNXP Semiconductors PCA9509
Level translating I2 C-bus/SMBus repeater
5. Pinning information
5.1 Pinning
5.2 Pin description[1] Port A and port B can be used for either SCL or SDA.
Table 3. Pin descriptionVCC(A) 1 port A power supply
A1[1] 2 port A (lower voltage side)
A2[1] 3 port A (lower voltage side)
GND 4 ground (0V) 5 enable input (active HIGH)
B2[1] 6 port B (SMBus/I2C-bus side)
B1[1] 7 port B (SMBus/I2C-bus side)
VCC(B) 8 port B power supply
NXP Semiconductors PCA9509
Level translating I2 C-bus/SMBus repeater
6. Functional descriptionRefer to Figure 1 “Functional diagram of PCA9509”.
The PCA9509 enables I2 C-bus or SMBus translation down to VCC(A) as low as 1.0 V (as
low as 0.95 V in special cases) without degradation of system performance. The
PCA9509 contains 2 bidirectional open-drain buffers specifically designed to support
up-translation/down-translation between the low voltage and 3.3 V SMBus or 5 V I2 C-bus.
The port B I/Os are over-voltage tolerant to 5.5 V even when the device is unpowered.
The PCA9509 includes a power-up circuit that keeps the output drivers turned off until
VCC(B) is above 2.5 V and the VCC(A) is above 0.8 V. VCC(B) and VCC(A) can be applied in
any sequence at power-up. After power-up and with the EN pin HIGH, a LOW level on
port A (below approximately 0.15 V) turns on the corresponding port B driver (either SDA
or SCL) and drives port B down to about 0 V. When port A rises above approximately
0.15 V, the port B pull-down driver is turned off and the external pull-up resistor pulls the
pin HIGH. When port B falls first and goes below 0.3VCC(B), the port A driver is turned on
and port A pulls down to 0.2 V (typical). The port B pull-down is not enabled unless the
port A voltage goes below VILc. If the port A low voltage goes below VILc, the portB
pull-down driver is enabled until port A rises above approximately 0.15 V (VILc), then
port B, if not externally driven LOW, continues to rise being pulled up by the external
pull-up resistor.
Remark: Ground offset between the PCA9509 ground and the ground of devices on port A of the PCA9509 must be avoided.
The reason for this cautionary remark is that a CMOS/NMOS open-drain capable of
sinking 3 mA of current at 0.4 V has an output resistance of 133 or less (R=E/ I). Such
a driver shares enough current with the port A output pull-down of the PCA9509 to be
seen as a LOW as long as the ground offset is zero. If the ground offset is greater than V, then the driver resistance must be less. Since VILc can be as low as 90 mV at cold
temperatures and the low end of the current distribution, the maximum ground offset
should not exceed 50 mV.
Bus repeaters that use an output offset are not interoperable with the port A of the
PCA9509 as their output LOW levels will not be recognized by the PCA9509 as a LOW. If
the PCA9509 is placed in an application where the VIL of port A of the PCA9509 does not
go below its VILc, it pulls port B LOW initially when port A input transitions LOW, but the
port B returns HIGH, so it does not reproduce the port A input on port B. Such applications
should be avoided.
Port B is interoperable with all I2 C-bus slaves, masters and repeaters.
6.1 EnableThe EN pin is active HIGH and allows the user to select when the repeater is active. This
can be used to isolate a badly behaved slave on power-up until after the system power-up
reset. It should never change state during an I2 C-bus operation because disabling during
a bus operation hangs the bus and enabling part way through a bus cycle could confuse
the I2 C-bus parts being enabled.
The enable pin should only change state when the bus and the repeater port are in an idle
state to prevent system failures.
NXP Semiconductors PCA9509
Level translating I2 C-bus/SMBus repeater
6.2I2 C-bus systemsAs with the standard I2 C-bus system, pull-up resistors are required to provide the logic
HIGH levels on the buffered bus (standard open-collector configuration of the I2 C-bus).
The size of these pull-up resistors depends on the system. Each of the port A I/Os has an
internal pull-up current source and does not require the external pull-up resistor. Port B is
designed to work with Standard-mode and Fast-mode I2 C-bus devices in addition to
SMBus devices. Standard-mode I2 C-bus devices only specify 3 mA output drive; this
limits the termination current to 3 mA in a generic I2 C-bus system where Standard-mode
devices and multiple masters are possible. Under certain conditions higher termination
currents can be used.
7. Application design-in informationA typical application is shown in Figure 5. In this example, the CPU is running on a 1.1V 2 C-bus while the master is connected to a 3.3 V bus. Both buses run at 400 kHz. Master
devices can be placed on either bus.
When port B of the PCA9509 is pulled LOW by a driver on the I2 C-bus, a CMOS
hysteresis detects the falling edge when it goes below 0.3VCC(B) and causes the internal
driver on port A to turn on, causing port A to pull down to about 0.2 V. When port A of the
PCA9509 falls, first a comparator detects the falling edge and causes the internal driver
on port B to turn on and pull the port B pin down to ground. In order to illustrate what
would be seen in a typical application, refer to Figure 6 and Figure 7. If the bus master in
Figure 5 were to write to the slave through the PCA9509, waveforms shown in Figure6
would be observed on the B bus. This looks like a normal I2 C-bus transmission.
On the A bus side of the PCA9509, the clock and data lines are driven by the master and
swing nearly to ground. After the eighth clock pulse, the slave replies with an ACK that
causes a LOW on the A side equal to the VOL of the PCA9509, which the master
recognizes as a LOW. It is important to note that any arbitration or clock stretching events
require that the LOW level on the A bus side at the input of the PCA9509 (VIL) is below
VILc to be recognized by the PCA9509 and then transmitted to the B bus side.
NXP Semiconductors PCA9509
Level translating I2 C-bus/SMBus repeater
8. Limiting values
Table 4. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).
VCC(B) supply voltage portB 0.5 +6.0 V
VCC(A) supply voltage portA 0.5 +6.0 V
VI/O voltage on an input/output pin port A 0.5 +6.0 V
port B; enable pin (EN) 0.5 +6.0 V
II/O input/output current - 20 mA input current - 20 mA
Ptot total power dissipation - 100 mW
Tstg storage temperature 65 +150 C
Tamb ambient temperature operating in free air 40 +85 C junction temperature - +125 C
Tsp solder point temperature 10 s max. - 300 C
NXP Semiconductors PCA9509
Level translating I2 C-bus/SMBus repeater
9. Static characteristics[1] Typical values with VCC(A)=1.1 V, VCC(B) =5.0V.
Table 5. Static characteristicsGND=0 V; Tamb= 40 Cto+85 C; unless otherwise specified.
SuppliesVCC(B) supply voltage portB 3.0 - 5.5 V
VCC(A) supply voltage portA 1.0[2] -VCC(B) 1V
ICC(A) supply current port A all port A static HIGH 0.25 0.45 0.9 mA
all port A static LOW 1.25 3.0 5 mA
ICC(B) supply current port B all port B static HIGH 0.5 0.9 1.1 mA
Input and output of port A (A1 to A2)VIH HIGH-level input voltage portA 0.7VCC(A) -VCC(A) V
VIL LOW-level input voltage portA [3] 0.5 - +0.3 V
VILc contention LOW-level input voltage [3] 0.5 +0.15- V
VIK input clamping voltage IL= 18 mA 1.5 - 0.5 V
ILI input leakage current VI =VCC(A) -- 1 A
IIL LOW-level input current [4] 1.5 1.0 0.45 mA
VOL LOW-level output voltage VCC(A) =0.95Vto 1.2V [5] -0.18 0.25 V
VCC(A)=> 1.2 V to
(VCC(B) 1V)
[5] -0.2 0.3 V
VOLVILc difference between LOW-level output
and LOW-level input voltage contention
[6] -50 - mV
ILOH HIGH-level output leakage current VO =1.1V - - 10 A
Cio input/output capacitance - 6 7 pF
Input and output of port B (B1 to B2)VIH HIGH-level input voltage portB 0.7VCC(B) -VCC(B) V
VIL LOW-level input voltage portB 0.5 - +0.3VCC(B) V
VIK input clamping voltage IL= 18 mA 1.5 - 0.5 V
ILI input leakage current VI =3.6V 1.0 - +1.0 A
IIL LOW-level input current VI =0.2V - - 10 A
VOL LOW-level output voltage IOL =6mA - 0.1 0.2 V
ILOH HIGH-level output leakage current VO =3.6V - - 10 A
Cio input/output capacitance - 3 5 pF
EnableVIL LOW-level input voltage 0.5 - +0.1VCC(A) V
VIH HIGH-level input voltage 0.9VCC(A) -VCC(B) V
IIL(EN) LOW-level input current on pin EN VI= 0.2 V, EN;
VCC =3.6V 1- +1 A
ILI input leakage current 1- +1 A input capacitance VI =3.0 V or 0V - 2 3 pF
NXP Semiconductors PCA9509
Level translating I2 C-bus/SMBus repeater[2] If the PCA9509 is not being enabled or disabled, the VCC(A) minimum is 0.95 V with a corresponding decrease in the IIL, which will drop
below the minimum specification of 450 A at cold temperature (see Figure 8 and Figure 9). This will not significantly change the rise
and fall times of the signals on port A since the IIL value represents the current source pull-up current, so a lower current into the same
capacitance results in a slower rise time and a longer transition time in general, however since the lower current is also associated with
a lower voltage swing the delay is somewhat compensated. The key point of the graphs is that the current has a temperature
dependence, and the output driver will also have the same temperature dependency so that the output offset of ~200 mV on port A is
nearly temperature independent. Even though the IIL parameter indicates that at VCC(A) of 0.95 V the PCA9509 can only sink up to
400 A instead of 450 A at cold temperature, the output is designed to be somewhat resistive such that under nominal conditions
(1.1 V) the current source pull-up sources 1 mA and the output pull-down sinks the 1 mA at ~200 mV, so as the current source current
decreases the output pull-down resistance increases in order to maintain the offset.
[3] VIL specification is for the falling edge seen by the port A input. VILc is for the static LOW levels seen by the port A input resulting in
port B output staying LOW.
[4] The port A current source has a typical value of about 1 mA, but varies with both VCC(A) and VCC(B). Below VCC(A) of about 0.7 V the
port A current source current drops to 0 mA. The current source current dropping across the internal pull-down driver resistance of
about 200 defines the VOL.
[5] As long as the chip ground is common with the input ground reference the driver resistance may be as large as 120 . However, ground
offset will rapidly decrease the maximum allowed driver resistance.
[6] Guaranteed by design.
NXP Semiconductors PCA9509
Level translating I2 C-bus/SMBus repeater
10. Dynamic characteristics[1] Load capacitance=50 pF; load resistance on portB= 1.35 k.
[2] Value is determined by RC time constant of bus line.
Table 6. Dynamic characteristics
VCC(A) =1.1 V; VCC(B) =3.3VtPLH LOWto HIGH propagation delay port B to portA [1] 69 109 216 ns
tPHL HIGHto LOW propagation delay port B to portA [1] 63 86 140 ns
tTLH LOWto HIGH output transition time portA [1] 14 22 96 ns
tTHL HIGHto LOW output transition time portA [1] 58.1 16 ns
tPLH LOWto HIGH propagation delay port A to portB [1] 69 91 139 ns
tPLH2 LOWto HIGH propagation delay 2 port A to port B; measured from
the 50 % of initial LOW on port A to
1.5 V rising on portB
[1] 91 153 226 ns
tPHL HIGHto LOW propagation delay port A to portB [1] 73 122 183 ns
tTLH LOWto HIGH output transition time portB [1][2] -61 -ns
tTHL HIGHto LOW output transition time portB [1] 15 24 40 ns
tsu set-up time EN HIGH before START condition 100 - - ns hold time EN HIGH after STOP condition 100 - - ns
VCC(A) =1.9 V; VCC(B) =5.0VtPLH LOWto HIGH propagation delay port B to portA [1] 69 105 216 ns
tPHL HIGHto LOW propagation delay port B to portA [1] 63 86 140 ns
tTLH LOWto HIGH output transition time portA [1] 14 27 96 ns
tTHL HIGHto LOW output transition time portA [1] 58 35 ns
tPLH LOWto HIGH propagation delay port A to portB [1] 69 89 139 ns
tPLH2 LOWto HIGH propagation delay 2 port A to port B; measured from
the 50 % of initial LOW on port A to
1.5 V rising on portB
[1] 91 131 226 ns
tPHL HIGHto LOW propagation delay port A to portB [1] 73 99 183 ns
tTLH LOWto HIGH output transition time portB [1][2] -65 -ns
tTHL HIGHto LOW output transition time portB [1] 15 31 40 ns
tsu set-up time EN HIGH before START condition 100 - - ns hold time EN HIGH after STOP condition 100 - - ns
NXP Semiconductors PCA9509
Level translating I2 C-bus/SMBus repeater
10.1 AC waveforms
11. Test informationNXP Semiconductors PCA9509
Level translating I2 C-bus/SMBus repeater
12. Package outline
