PCA9507D ,2-wire serial bus extender for HDMI DDC I2C-bus and SMBusFeaturesn 2 channel, bidirectional buffer isolates capacitance allowing 1400 pF on port A and400 pF ..
PCA9507DP ,2-wire serial bus extender for HDMI DDC I2C-bus and SMBusfeatures of the I C-bus system during the level2shifts, it also permits extension of the I C-bus by ..
PCA9508D ,Hot swappable level translating I2C-bus repeaterfeatures of the I C-bus system during the level shifts, it also permits extension of the2I C-bus by ..
PCA9509D ,Level translating I虏C-bus/SMBus repeaterfeatures of the I C-bus system during the level shifts, it also 2permits extension of the I C-bus b ..
PCA9509DP ,Level translating I虏C-bus/SMBus repeaterfeatures of the I C-bus system during the level shifts, it also 2permits extension of the I C-bus b ..
PCA9509GM ,Level translating I虏C-bus/SMBus repeaterGeneral description2The PCA9509 is a level translating I C-bus/SMBus repeater that enables processo ..
PEF82912FV1.3 . ,Q-SMINTI (2B1Q Second Gen. Modular IS...Data Sheet, DS 1, March 2001®Q-SMINT I2B1Q Second Gen. Modular ISDN NT (Intelligent)PEF 82912/82913 ..
PEF82912HV1.3 ,Q-SMINTI (2B1Q Second Gen. Modular IS...Data Sheet, DS 1, March 2001®Q-SMINT I2B1Q Second Gen. Modular ISDN NT (Intelligent)PEF 82912/82913 ..
PEMB1 ,PNP resistor-equipped transistors R1 = 22kOhm/R2 = 22kOhmLIMITING VALUESIn accordance with the Absolute Maximum Rating System (IEC 60134).SYMBOL PARAMETER C ..
PEMB13 ,PNP/PNP resistor-equipped transistors; R1 = 4.7 k惟, R2 = 47 k惟
PEMB18 ,PEMB18; PUMB18; PNP/PNP resistor-equipped transistors; R1 = 4.7 kOhm, R2 = 10 kOhmapplications1.4 Quick reference dataTable 2: Quick reference dataSymbol Parameter Conditions Min Ty ..
PEMB19 ,PNP/PNP resistor-equipped transistors; R1 = 22 kOhm, R2 = openapplications1.4 Quick reference dataTable 2: Quick reference dataSymbol Parameter Conditions Min Ty ..
PCA9507D-PCA9507DP
2-wire serial bus extender for HDMI DDC I2C-bus and SMBus
General descriptionThe PCA9507 is a 2-wire serial bus extender providing 3.3 V to 5 V level shift that allows
up to 18 meters bus extension for reliable DDC, I2 C-bus or SMBus applications. While
retaining all the operating modes and features of the I2 C-bus system during the level
shifts, it also permits extension of the I2 C-bus by providing bidirectional buffering for both
the data (SDA) and the clock (SCL) line as well as the rise time accelerator on portA
enabling the bus to drive a load up to 1400 pF or distance of 18 m on port A, and 400pF portB. Using the PCA9507 enables the system designerto isolate bus capacitanceto
meet HDMI DDC version 1.3 distance specification. The SDA and SCL pins are
overvoltage tolerant and are high-impedance when the PCA9507 is unpowered.
The port B drivers with static level offset behave much like the drivers on the PCA9515
device, while the port A drivers integrate the rise time accelerator, sink more current and
eliminate the static offset voltage. This resultsina LOWon portB translating intoa nearly V LOW on port A. The static level offset design of the port B I/O drivers prevent them
from being connected to another device that has rise time accelerator including the
PCA9510, PCA9511, PCA9512, PCA9513, PCA9514, PCA9515, PCA9516A, PCA9517
(B-side), or PCA9518. The port A sides of two or more PCA9507s can be connected
together, however, to allow a star topography with port A on the common bus, and portA
canbe connected directlyto any other buffer with staticor dynamic offset voltage. Multiple
PCA9507s can be connected in series, port A to port B, with no build-up in offset voltage
with only time of flight delays to consider. Rise time accelerator on port A is turned on
when input threshold is above 0.3VCC(A).
The PCA9507 drivers are not enabled unless VCC(A) and VCC(B) are above 2.7 V. The EN
pin can also be used to turn the drivers on and off under system control. Caution should
be observed to only change the state of the enable pin when the bus is idle. The output
pull-down on the port B internal buffer LOW is set for approximately 0.5 V, while the input
threshold of the internal buffer is set about 70 mV lower (0.43 V). When the port B I/O is
driven LOW internally, the LOW is not recognized as a LOW by the input. This prevents a
lock-up condition from occurring.
Features 2 channel, bidirectional buffer isolates capacitance allowing 1400 pF on port A and
400 pF on portB Exceeds 18 meters (above the maximum distance for HDMI DDC) Rise time accelerator and normal I/O on portA Static level offset on portB Voltage level translation from 2.7 V to 5.5V Upgrade replacement over PCA9517 for cable application
PCA9507
2-wire serial bus extender for HDMI DDC I2 C-bus and SMBus
Rev. 01 — 7 February 2008 Product data sheet
NXP Semiconductors PCA9507
2-wire serial bus extender for HDMI DDC I2 C-bus and SMBusI2 C-bus, SMBus and DDC-bus compatible Active HIGH buffer enable input Open-drain input/outputs Lock-up free operation Supports arbitration and clock stretching across the repeater Accommodates Standard-mode and Fast-mode I2 C-bus devices and multiple masters Powered-off high-impedance I2 C-bus pins Port A operating supply voltage range of 2.7 V to 5.5V Port B operating supply voltage range of 2.7 V to 5.5V5 V tolerant I2 C-bus and enable pins0 Hz to 400 kHz clock frequency (the maximum system operating frequency may be
less than 400 kHz because of the delays added by the repeater) ESD protection exceeds 5000 V HBM per JESD22-A114, 400 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101 Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA Packages offered: SO8 and TSSOP8
Ordering information[1] Also known as MSOP8.
Functional diagram
Table 1. Ordering informationPCA9507D PCA9507 SO8 plastic small outline package; 8 leads;
body width 3.9 mm
SOT96-1
PCA9507DP 9507 TSSOP8[1] plastic thin shrink small outline package; leads; body width3 mm
SOT505-1
NXP Semiconductors PCA9507
2-wire serial bus extender for HDMI DDC I2 C-bus and SMBus Pinning information
5.1 Pinning
5.2 Pin description Functional descriptionRefer to Figure 1 “Functional diagram of PCA9507”.
The PCA9507 consists of a pair of bidirectional open-drain I/Os specifically designed to
support up-translation/down-translation between low voltages (as low as 2.7 V) and a
3.3 V or 5 V I2 C-bus and SMBus. The device contains a rise time accelerator on portA
that enables the deviceto drivea long cableora heavier capacitive loadfor DDC,I2 C-bus
and SMBus applications. With dual supply rails, the device translates from voltage ranges
2.7 V to 5.5 V down to a voltage as low as 2.7 V without degradation of system
performance. All I/Os are overvoltage tolerant to 5.5 V even when the device is
un-powered (VCC(B) and/or VCC(A)=0 V).
The PCA9507 includes a power-up circuit that keeps the output drivers turned off until
VCC(A) and VCC(B) rise above 2.7V . VCC(A) and VCC(B) can be applied in any sequence at
power-up.
Table 2. Pin descriptionVCC(A) 1 port A supply voltage (2.7 V to 5.5V)
SCLA 2 serial clock port A bus with rise time accelerator for DDC line or cable,V tolerant
SDAA 3 serial data port A bus with rise time accelerator for DDC line or cable,V tolerant
GND 4 supply ground (0V) 5 active HIGH buffer enable input
SDAB 6 serial data port B bus with static level offset, 5V tolerant
SCLB 7 serial clock port B bus with static level offset, 5V tolerant
VCC(B) 8 port B supply voltage (2.7 V to 5.5V)
NXP Semiconductors PCA9507
2-wire serial bus extender for HDMI DDC I2 C-bus and SMBusWhen port B falls first and goes below 0.3VCC(B) the port A driver is turned on and portA
pulls downto0V.As portA falls below 0.3VCC(A) the portB pull-down pulls portB downto
about 0.5 V. Port B falls below 0.4 V because it is not possible to know who is driving the
port A LOW, so the PCA9507 direction control assumes that port A is controlling the part
unless port B falls below 0.4V . When the port B voltage is≤ 0.4 V the port A driver of the
PCA9507ison and holds portA down nearly0V.As the portB voltage rises because the
external driver turns off, the port B voltage rises up to ~0.5 V because port A is LOW;
once port B rises to ~0.5 V the port A pull-down driver turns off. Then port A rises with a
rise time determined by the RC of port A when it crosses the port A threshold ~0.3VCC(A)
the portB driveris turnedoff and the rising edge acceleratoris turned on, which causesa
faster rising edge until it reaches the turn-off point for the rising edge accelerator
~0.7VCC(A). Then it continues to rise at the slower rate determined by the RC of portA.
When the port B driver turns off, port B rises with the RC of portB.
VCC(A) powers the port A I/Os and the 0.3VCC(A) reference for port A as well as the portA
power good detect circuit. VCC(B) powers the restof the chip including the portB I/Os and
the support functions. Figure 4 illustrates the threshold and I/O levels for port A and
portB.
6.1 EnableThe EN pin is active HIGH with an internal ~100 kΩ pull-up to VCC(B) and allows the user
to select when the buffer is active. This can be used to isolate the line when the HDMI
DDC transmitteror receiveris not ready,or froma badly behaved slaveon power-up until
after the system power-up reset.It should never change state duringanI2 C-bus operation
because disabling duringa bus operation will hang the bus and enabling part way through
a bus cycle could confuse the I2 C-bus parts being enabled. The enable pin should only
change state when the global bus and the buffer port areinan idle stateto prevent system
failures.
6.2 Rise time acceleratorsPCA9507 has rise time accelerators on port A only. During port A positive bus transitions
a current source is switched on to quickly slew the SDAA and SCLA lines HIGH once the
input level of 0.3VCC(A) is exceeded for the PCA9507 and turns off as the 0.7VCC(A)
voltage is approached.
NXP Semiconductors PCA9507
2-wire serial bus extender for HDMI DDC I2 C-bus and SMBus
6.3 Resistor pull-up value selection
6.3.1 Port A (SDAA and SCLA)SDAA and SCLA are open-drain I/O that have rise time accelerators and strong pull-down.
When the inputs transition above 0.3VCC(A), the rise time accelerator activates and boosts
the pull-up current during rising edgeto meet theI2 C-bus rise time specification when the
device drivesa long cableor heavier capacitance load. The strong pull-down enables the
outputto driveto nearly zero voltagefor logic LOW. The selection for pull-up resistors are
defined in the HDMI DDC specification shown in Table 3. For HDMI transmitter
applications like digital video player, recorder, or set-top box, the pull-up resistor is in the
rangeof 1.5 kΩto2 kΩ. For HDMI receiver applications likein LCD TVor video card, the
pull-up resistor is 47 kΩ on the SCLA line, and there is no pull-up on the SDAA line.
Please refer to Table3, Figure 7 and Figure 8 for more details. Figure 5 shows the portA
pull-up resistor values (in kΩ) versus capacitance load (in nF) for 5 V supply voltage
complied with 1 μs rise time per I2 C-bus Standard-mode specification. The graph
contrastsa shaded and unshaded region. Any resistor value chosen within the unshaded
region would comply with 1 μs rise time, while any value chosen in the shaded region
would not.
Table 3. HDMI DDC pull-up resistors specificationSDAA at the source (DVD/STB) 1.5kΩ 2.0kΩ
at the sink (LCD TV) - -
SCLA at the source (DVD/STB) 1.5kΩ 2.0kΩ
at the sink (LCD TV) 47 kΩ±10%
NXP Semiconductors PCA9507
2-wire serial bus extender for HDMI DDC I2 C-bus and SMBus
6.3.2 Port B (SDAB and SCLB)SDAB and SCLB are standard I2 C-bus with static level offset that has no rise time
accelerator. The static level offset produces an output LOW of 0.5 V (typical) at 6 mA. As
with the standardI2 C-bus system, pull-up resistors are requiredto provide the logic HIGH
levels. The sizeof these pull-up resistors dependson the system requirement, and should
meet the current sinking capability of the device that drives the buffer, as well as that of
the buffer. The minimum and maximum pull-up resistors are determined and the pull-up
resistor’s value is chosen to be within the minimum and maximum range.
Using Equation 1, calculate the minimum pull-up resistor value:
(1)
Where:
RPU(min) is the minimum pull-up resistor value for the open-drain SCLB and SDAB.
VCC(B)(max) is the maximum supply rail of the pull-up resistor.
0.4 V is the maximum VOL of the device that drives the buffer on logic LOW.
IOL(max) at VOL= 0.4 V is the maximum sink current of the device that drives the buffer
on logic LOW.
The maximum pull-up resistor should alsobe sized such that the RC time constant meets
the standard I2 C-bus rise time, which is 1 μs for Standard-mode (100 kHz) or 300 ns for
Fast-mode (400 kHz). DDC bus complies with the I2 C-bus Standard-mode and operates
below 100 kHz, and maximum rise time is 1 μs using a simplified RC equation.
Using Equation 2, calculate the maximum pull-up resistor value:
(2)
Where:
RPU(max) is the maximum allowable pull-up resistor on the SCLB and SDAB in order to
meet the I2 C-bus rise time specification.
CL(max) is the maximum allowable capacitance load (include the capacitance of driver,
the line, and the buffer) in order to meet the rise time specification.is the rise time specifiedas1μs (for bus speed 100 kHzor lower) and 300ns (for bus
speed 400 kHz or lower).
The chosen pull-up resistor RPU is: RPU(min)≤ RPU≤ RPU(max).PU max() CL max()× 1.2tr×=
NXP Semiconductors PCA9507
2-wire serial bus extender for HDMI DDC I2 C-bus and SMBus Application design-in informationA typical application is shown in Figure 6. In this example, the system master is running
on a 3.3 V I2 C-bus while the slave is connected to a 5 V bus. Both buses run at 400 kHz.
Master devices can be placed on either bus. HDMI DDC applications for DVD/R and
LCD TV are shown in Figure 7 and Figure 8, respectively. In these applications the HDMI
transmitteror receiveris 3.3V, while the DDC lineis5V, PCA9507 behaves likea voltage
level shift,a buffer and long cable bus extenderto ensure signal integrityfor accessing the
EDID on the DDC line.
NXP Semiconductors PCA9507
2-wire serial bus extender for HDMI DDC I2 C-bus and SMBusAccording to Figure 6, when port A of the PCA9507 is pulled LOW by a driver on the2 C-bus, a comparator detects the falling edge when it goes below 0.3VCC(A) and causes
the internal driver on port B to turn on, causing port B to pull down to about 0.5 V. When
port B of the PCA9507 falls, first a CMOS hysteresis type input detects the falling edge
and causes the internal driveron portAto turnon and pull the portA pin downto ground.
In order to illustrate what would be seen in a typical application, refer to Figure 11 and
Figure 12.
If the bus master in Figure 6 were to write to the slave through the PCA9507, waveforms
shown in Figure 11 would be observed on the A bus. This looks like a normal I2 C-bus
transmission except that the HIGH level may be as low as 2.7 V, and the turn on and turn
off of the acknowledge signals are slightly delayed.
The master drives theB busto groundor letsit floatto VCC(B)asit sends datato the slave
at the falling edge of the 8th clock, master releases SDAB on the B bus and slave pulls
SDAA on the A bus to ground, causing the PCA9507 to pull SDAB on the B bus to 0.5V.
At the falling edge of the 9th clock, the master again drives the B bus and slave releases
the A bus.
Multiple PCA9507 port A sides can be connected in a star configuration (Figure 9),
allowing all nodes to communicate with each other.
Multiple PCA9507s canbe connectedin series (Figure 10)as longas portAis connected
to port B. I2 C-bus slave devices can be connected to any of the bus segments. The
number of devices that can be connected in series is limited by repeater
delay/time-of-flight considerations on the maximum bus speed requirements.
NXP Semiconductors PCA9507
2-wire serial bus extender for HDMI DDC I2 C-bus and SMBus
NXP Semiconductors PCA9507
2-wire serial bus extender for HDMI DDC I2 C-bus and SMBus Limiting values
Table 4. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).
VCC(B) supply voltage portB 2.7 V to 5.5V −0.5 +7 V
VCC(A) supply voltage portA adjustable −0.5 +7 V
VI/O voltage on an input/output pin port B; enable pin (EN) −0.5 +7 V
II/O input/output current port A; portB - 50 mA input current EN, VCC(A),VCC(B), GND - 50 mA
Ptot total power dissipation - 100 mW
Tstg storage temperature −55 +125 °C
Tamb ambient temperature operating in free air −40 +85 °C junction temperature - +125 °C
