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PC87372-IBW/VLA
LPC SuperI/O with Glue Functions
PC87372 LPC SuperI/O with Glue FunctionsOctober 2002
Revision 1.2
PC87372
LPC SuperI/O with Glue Functions
General DescriptionThe National Semiconductor® PC87372 AdvancedI/O prod-
uctisa memberof the PC8737x SuperI/O family. All
PC8737x devices are highly integrated and arepin and soft-
ware compatible, thus providing drop-in interchangeability
and enablinga varietyof assembly options using onlya sin-
gle motherboard and BIOS.
PC87372 integration allowsfora smaller systemboard sizeand
saves on total system cost.
The PC87372 includes legacy SuperI/O functions, system
glue functions, fan monitoring and control, commonly used
functions suchas GPIO, and ACPI-compliant Power Man-
agement support.
The PC87372 integrates miscellaneous analog and digital
system glue functionsto reduce the numberof discrete
components required. The host communicates with the
functions integratedinthe PC87372 device throughan LPC
Bus Interface.
The PC87372 Legacy functions are:a serial port (UART),a
fully compliant IEEE 1284 Parallel Port,a Floppy Disk Con-
troller (FDC) and a Keyboard/Mouse Controller (KBC).
The Fan Speed Monitor (FSM) module allowsthe systemto
monitor two fans.
The PC87372 extended wake-up support complements the
ACPI controllerinthe chipset. The System Wake-Up Control
(SWC) module, poweredby VSB3, supportsa flexible wake-
up mechanism.
There are13 General-Purpose Input/Output (GPIO) ports;
these allow system control and wake-upon system events.
Outstanding Features Legacy modules: Parallel Port, Floppy Disk Controller
(FDC), Serial Port anda Keyboard and Mouse Control-
ler (KBC) Glue functionsto complement the South Bridge func-
tionality Fan Speed monitoring of two fans VSB3 -powered Power Management with 20 wake-up
sources Controls three LED indicators 13 GPIO ports with a variety of wake-up options LPC interface, basedon Intel’s LPC Interface Specifica-
tion Revision 1.0, September 29th, 1997 PC01 Revision1.0 andAdvanced Configuration and Pow-
er Interface (ACPI) Specification Revision 2.0 compliant 128-pin PQFP package
Block Diagram
IEEE 1284
Parallel Port
Floppy Disk
ControllerFloppy Drive
Interface
LPC Bus
InterfaceLPC
Interface
Serial PortSerial
Interface
Serial
IRQ
Parallel Port
Interface
VDD3
Keyboard &
Mouse ControllerKeyboard
Interface
Mouse
Interface
I/O
GPIO PortsFan Speed
Wake-Up Control
SystemPME PortsSB3
PnP
ConfigurationWake-Up
Events
14.31818 MHz
Inputs
Tachometer
48 MHz
GlueMiscellaneous
I/O
Registers
Clock
Generator
Monitor Functions
Internal Bus32.768 KHz
