PAL20L8 ,MOS DIGITAL INTERGRATED CIRCUIT SILICON GATE CMOSTOSHIBA TC55V16100FTI-12,-151,048,576-WORD BY 16-BIT CMOS STATIC RAMThe TC55V16100FTI is a 16,777,2 ..
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PAL20L8
MOS DIGITAL INTERGRATED CIRCUIT SILICON GATE CMOS
TOSHIBA TC55V16100FTI-12,-15
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
1,048,576-WORD BY 16-BIT CMOS STATIC RAM
DESCRIPTION
The TC55V16100FTI is a 16,777,216-bit high-speed static random access memory (SRAM) organized as
1,048,576 words by 16 bits. Fabricated using CMOS technology and advanced circuit techniques to provide
high speed, it operates from a single 3.3 V power supply. Chip enable (CE) can be used to place the device in a
low-power mode, and output enable (OF) provides fast memory access. Data byte control signals (1713, Trg)
provide lower and upper byte access. This device is well suited to cache memory applications where high-speed
access and high-speed storage are required. All inputs and outputs are directly LVTTL compatible. It
guarantees -40'' to 85°C operating temperature so it is suitable for use in wide operating temperature system.
The TC55V16100FTI is available in plastic 54-pin TSOP with 400mi1 width for high density surface assembly.
FEATURES
0 Fast access time(the following are maximum values) 0 Single power supply voltage :3.3V-k 0.3V
TC55V16100FTI-12: 12 ns 0 Fully static operation
TC55V16100FTI-15: 15 ns 0 Operating temperature range : -4ty' to 85°C
0 Low-power dissipation o All inputs and outputs are LETL compatible
Cycle Time 12 15 ns 0 Output buffer contrel us_i_r_1_g OE
. 0 Data byte control usmg LB (I/Ol to U08) and
Operation (max) 420 380 mA W (1/09 to 1/016)
Standby : 4mA(max) qt Package: .
TSOP H 54-P-400-0.80B (Weight: 0.55g typ)
PIN ASSIGNMENT PIN NAMES
0 A0 to A19 Address Inputs
"83):: ; il' :1 Egg 1/01 1;:I/O16 Data Inputs/Outputs
HOME 3 52 = |/O11 CE Chip Enable Input
'33:: ll ==,' 5330 E Write Enable Input
|/O16|= 6 49 = I/O9 OE Output Enable Input
’23: g g g ti', L7,t.% Data Byte Control Inputs
2%: l g = tl VDD Power(+ 3.3V)
1: 1 =
A_or: 11 E 44 = Ag GND Ground
LEI: 1g - g = (l-f NC No Connection
CE: 1 4 :1
ml: 14 > 41 = GND NU Not Usable
WEI: 15 a. 40 = Wu
NCI: 16 O 39 :1 L
A191: 17 C. 38 = A10
A18: 18 37 = A11
A17: 19 36 = A12
A16: 20 35 :1 A13
A15: 21 M = A14
l/O1r= 22 33 =1 |/O8
VDD: 23 32 = GND
1/0212 24 31 =1 1/07
|/O3|: 25 30 = l/O6
GND: 26 29 = VDD
I/O4I= 27 28 = 1/05
000707EBA2
O TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction
or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA
products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a mal unction or
failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent
TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor
Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc..
0 The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office
equipment, measurina equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for
usage in equipment t at requires extraordinarily high quality and/or reliability or a malfunction or failure of which m.ay cause loss of human life or
bodily injury CUnintended Usage"). Unintended Usage include atomic ener y control instruments, airplane or spaceship instruments, transportation
instruments, traffic signal instruments, combustion control instruments, me ical instruments, all types of safety devices, etc.. Unintended Usage of
TOSHIBA products listed in this document shall be made at the customer's own risk.
0 The products described in this document are subject to the foreign exchange and foreign trade laws.
0 The information contained herein is presented only as a guide for the ap lications of our products. No responsibility is assumed by TOSHIBA
CORPORATION for any infringements of intellectual property or other rights 0 the third parties which may result from its use. No license is granted
b implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others.
0 The information contained herein is subject to change without notice.
2000-07-11 1/8
TOSHIBA
BLOCK DIAG RAM
>>>>>>>>>>
("I |— C 0‘
MAXIMUM RATINGS
BUFFER
Q'—* DE
G ENERATOR
MEMORY
CELL ARRAY
TC55V16100FTI-12,-15
A-o GND
1,024x 1,024x 16
(16,777,216)
SENSE AMP
COLUMN
DECODER
COLUMN
OUTPUT
BUFF ER
OUTPUT
BUF F ER
ADDRESS BUFFER
A10 A12 A14 A16 A18
A11A13 A15 A17 A19
SYMBOL RATING VALUE UNIT
VDD Power Supply Voltage - 0.5 to 4.6 V
VIN Input Terminal Voltage - 0.5* to 4.6 V
I/vo Input/Output Terminal Voltage - 0.5* to VDD + 0.5** V
PD Power Dissipation 1.8 W
Tsolder Soldering Temperature (10s) 260 ''C
Tstrg Storage Temperature - 65 to 150 "C
Topr Operating Temperature - 40 to 100 ''C
* : -1.5V with a
** : VDD+1.5V wit
ulse width of 20% . tRC min (4ns max)
a pulse width of 20% . tRC min (4ns max)
DC RECOMMENDED OPERATING CONDITIONS (Ta = - 40° to 85°C)
SYMBOL PARAMETER MIN TYP MAX UNIT
VDD Power Supply Voltage 3.0 3.3 3.6 V
VlH Input High Voltage 2.0 - VDD + 0.3** V
" Input Low Voltage - O.3* - 0.8 V
: -1.OV with a pulse w1dth of 20% . tRC min(4ns max)
: VDD+ 1.0V with a pulse width of 20% .tRC min(4ns max)
2000-07-1 1
TOSHIBA
TC55V16100FTI-12,-15
DC CHARACTERISTICS (Ta = - 40° to 85°C, VDD = 3.3V i 0.3V)
SYMBOL PARAMETER TEST CONDITION MIN TYP MAX UNIT
l Input Leakage Current V 0 t V 1 1 A
. = o - -
IL (Except NU pin) IN DD #
E=V|H or W=V|L or oi-N/m
lLo Output Leakage Current Vour= 0 to VDD - 1 - 1 trA
Input Current VIN = 0 to 0.8V - 1 - 20
h(NU) (NU . ) prA
pln V|N=0 to 0.2V -1 - 1
IOH = - 2mA 2.4 - -
VOH Output High Voltage
lou-- -10OA Voo-0.2 - - V
IOL = 2mA - - 0.4
VOL Output Low Voltage
IOL=1OO#A - - 0.2
cf-- VI, Iout = 0mA tcycle =12ns - - 420
IDDO Operating Current OE = VIH mA
Other Inputs-- VDO- 0.2V or 0.2V tcycle =15ns - - 380
I DDSI E: VIHI Other Inputs-- " or " - - 105
Stand by Cu rrent E = VDD - 0.2V mA
loose - - 4
Other lnputs=Voo-0.2V or 0.2V
CAPACITANCE (Ta = 25°C,f = 1.0 MHz)
SYMBOL PARAMETER TEST CONDITION MAX UNIT
CIN Input Capacitance VIN = GND 6 pF
CI/o Input/Output Capacitance Vvo = GND 8 pF
Note: This parameter is periodically sampled and is not 100% tested.
OPERATING MODE
MODE tr E WE E W l/Ol to l/O8 I/O9 to l/O16 POWER
L L Output Output IDDO
Read L L H H L High Impedance Output IDDO
L H Output High Impedance IDDO
L L Input Input IDDO
Write L x L H L High Impedance Input Iooo
L H Input High Impedance IDDO
L H H x x
Outputs Disable High Impedance High Impedance IDDO
L x x H
Standby H x x x x High Impedance High Impedance IDDS
M : Don't care
Note: The NU pin must be left unconnected or tied to GND or a voltage level of less than 0.8 V.
You must not apply a voltage of more than 0.8V to the NU.
2000-07-1 1
TOSHIBA
TC55V16100FTI-12,-15
AC CHARACTERISTICS (Ta = - 40° to 85°C (Note 1), VDD = 3.3V 1 0.3V)
READ CYCLE
TC55V16100FTl-12 TC55V16100FTI-15
SYMBOL PARAMETER UNIT
MIN MAX MIN MAX
tRc Read Cycle Time 12 - 15 -
tAcc Address Access Time - 12 - 15
tco Chip Enable Access Time - 12 - 15
tog Output Enable Access Time - 6 - 8
tBA Upper Byte, Lower Byte Access Time - 6 - 8
tOH Output Data Hold Time from Address Change 3 - 3 -
tCOE Output Enable Time from Chip Enable 3 - 3 - ns
tOEE Output Enable Time from Output Enable 1 - 1 -
tBE Output Enable Time from Upper Byte, Lower Byte 1 - 1 -
tcoo Output Disable Time from Chip Enable - 7 - 8
tooo Output Disable Time from Output Enable - 7 - 8
tBD Output Disable Time from Upper Byte, Lower Byte - 7 - 8
WRITE CYCLE
TC55V16100FTl-12 TC55V16100FTI-15
SYMBOL PARAMETER UNIT
MIN MAX MIN MAX
twc Write Cycle Time 12 - 15 -
twp Write Pulse Width 8 - 10 -
tcw Chip Enable to End of Write 9 - 11 -
tsw Upper Byte, Lower Byte Enable to End of Write 9 - 11 -
tAw Address Valid to End of Write 9 - 11 -
tus Address Setup Time 0 - 0 - ns
twe Write Recovery Time 0 - 0 -
tos Data Setup Time 7 - 8 -
tDH Data Hold Time 0 - 0 -
toew Output Enable Time from Write Enable 1 - 1 -
toow Output Disable Time from Write Enable - 7 - 8
AC TEST CONDITIONS Lig._1 3.3V
Input Pulse Level 3.0V/0.0V
Input Pulse Rise and Fall Time 2ns 1200Q
1/0 20 = 50n I/Opin
Input Timing Measurement ISV
Reference. Llevel CL = 30 pF RL = 509 CL = 5pF 8700
Output Timing Measurement 1.5V J; JC
Reference Level h-- 1.5V (For tcos, tOEE: tBE, tCOD,
Output Load Fig. 1 tso, tooo, tow and tonw)
2000-07-1 1
TOSHIBA TC55V16100FTI-12,-15
TIMING DIAGRAMS
READ CYCLE (See Note 2)
ADDRESS
tCOD (See Note 6)
tODO (See Note 6)
E (See Note 6)
t (See Note 6)
Note 6 BD
VALID DATA OUT
tCOE (See Note 6)
INDETERMINATE INDETERMINATE
WRITE CYCLE 1 (W CONTROLLED) (See Note 5)
ADDRESS X X
tas twp tWR
"i7irt"" ' _ y'
W, m "h A"
I tODW (See Note 6) tOEW (See Note 6)
Dout (See Note 4)
INDETERMINATE I tos toc INDETERMINATE
Din , VALID DATA IN X
2000-07-11 5/8
TOSHIBA TC55V16100FTI-12,-15
WRITE CYCLE 2 (Cl CONTROLLED) (See Note 5)
4 twc '
ADDRESS X X
Us twp tWR
WE _ //
-- -r , f
E N R i
W, E _ y'"
tag (See Note 6)
(S N 6) LODW(See Note 6)
t Evi) ote
Dout COE t
INDETERMINATE its-os-ti-Ori,
Din VALID DATA IN
WRITE CYCLE 3 (OB, W CONTROLLED) (See Note 5)
ADDRESS X X
tas twp tWR
m "h, 2%
"ttl'" i
W, m S \\ i!
N tCOE (See Note 6)
LODW(See Note 6)
Dout tBE (See Note 6) ,
INDETERMINATE tos ‘tD_H>
Din VALID DATA IN
2000-07-11 6/8
TOSHIBA TC55V16100FTI-12,-15
Note: (1) Operating temperature (Ta) is guaranteed for transverse air flow exceeding 400
linear feet per minute.
(mm remains HIGH for the Read Cycle.
(3) If tTrif goes LOW coincident with or after 1Trfif goes LOW, the outputs will remain
at high impedance.
(4) If UE goes HIGH coincident with or before 1TrtT goes HIGH, the outputs will remain
at high impedance.
(5) If tTE is HIGH during the write cycle, the outputs will remain at high impedance.
(6) The parameters specified below are measured using the load shown in Fig. 1.
(A) tCOE, tOEE,tBE, tOEW ...... Output Enable Time
(B) tCOD, toDo, tBD, tODw ...... Output Disable Time
w, m n
(A) (B)
r ii 0.2V
V 0.2 V ,
Dour VALID DATA OUT
A 0.2 V t 0.2 v
INDETERMINATE ' INDETERMINATE ,
2000-07-11 7/8
TOSHIBA TC55V16100FTI-12,-15
PACKAGE DIMENSIONS
Plastic TSOP (TSOPII 54-P-400-0.803)
Unit in mm
i'ipasrmummwuupspppssppi2i' -
IO.16:0.1 _‘ A
11.76 :02
tire""'?:.,,,,":).?,,,)),,',,,::,,?"""""),
0.71TYP L 1 Fa losztgjggm
1; 2222101 J, g ii
'i---' g l
Weight .' 0.559 (Typ)
2000-07-11 8/8
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