OP279 ,Rail-to-Rail High Output Current Operational AmplifierSpecifications subject to change without notice.–2–REV. GOP179/OP279ABSOLUTE MAXIMUM RATINGS 2Packa ..
OP279GP ,Rail-to-Rail High Output Current Operational AmplifiersCHARACTERISTICS␣Offset VoltageV = 2.5 V –5mVOP179 VOS OUTOP279 V V = 2.5 V –4mVOS OUTInput Bias Cur ..
OP279GRU ,Rail-to-Rail High Output Current Operational AmplifiersApplications that benefit from the high output current of the–V +IN BOP179/OP279 include driving he ..
OP279GS ,Rail-to-Rail High Output Current Operational AmplifiersFEATURESRail-to-Rail Inputs and Outputs5-Lead SOT-23-5High Output Current: 660 mA(RT-5)Single Suppl ..
OP279GSZ , Rail-to-Rail High Output Current Operational Amplifiers
OP27AJ/883C ,Low Noise, Precision Operational AmplifierFEATURES PIN CONNECTIONSLow Noise: 80 nV p-p (0.1 Hz to 10 Hz), 3 nV/÷HzTO-99Low Drift: 0.2 V/C(J ..
P3203ABL , SIDACtor® Protection Thyristors Baseband Protection (Voice-DS1)
P3203ABL , SIDACtor® Protection Thyristors Baseband Protection (Voice-DS1)
P3203ACL , SIDACtor® Protection Thyristors Baseband Protection (Voice-DS1)
P3203ACL , SIDACtor® Protection Thyristors Baseband Protection (Voice-DS1)
P3203ACLRP , Low voltage overshoot Balanced overvoltage protection
P3206UBL , SIDACtor® Balanced Multiport Series - MS-013
OP279
Rail-to-Rail High Output Current Operational Amplifier
PIN CONFIGURATIONSRail-to-Rail High Output
Current Operational Amplifiers
GENERAL DESCRIPTIONThe OP179 and OP279 are rail-to-rail, high output current,
single-supply amplifiers. They are designed for low voltage
applications that require either current or capacitive load drive
capability. The OP179/OP279 can sink and source currents of60 mA (typical) and are stable with capacitive loads to 10 nF.
Applications that benefit from the high output current of the
OP179/OP279 include driving headphones, displays, transform-
ers and power transistors. The powerful output is combined with a
unique input stage that maintains very low distortion with wide
common-mode range, even in single supply designs.
The OP179/OP279 can be used as a buffer to provide much
greater drive capability than can usually be provided by CMOS
outputs. CMOS ASICs and DAC often have outputs that can
swing to both the positive supply and ground, but cannot drive
more than a few milliamps.
Bandwidth is typically 5 MHz and the slew rate is 3 V/µs, making
these amplifiers well suited for single supply applications that
require audio bandwidths when used in high gain configurations.
Operation is guaranteed from voltages as low as 4.5 V, up to 12 V.
Very good audio performance can be attained when using the
OP179/OP279 in 5 volt systems. THD is below 0.01% with a
600Ω load, and noise is a respectable 21nV/√Hz. Supply current
is less than 3.5 mA per amplifier.
The single OP179 is available in the 5-lead SOT-23-5 package.
It is specified over the industrial (–40°C to +85°C) tempera-
ture range.
The OP279 is available in 8-lead TSSOP and SO-8 surface
mount packages. They are specified over the industrial (–40°C
to +85°C) temperature range.
8-Lead SOIC and TSSOP
SO-8 (S) and RU-8
FEATURES
Rail-to-Rail Inputs and Outputs
High Output Current:�60 mA
Single Supply:5 V to 12 V
Wide Bandwidth: 5 MHz
High Slew Rate:3 V/�s
Low Distortion:0.01%
Unity-Gain Stable
No Phase Reversal
Short-Circuit Protected
Drives Capacitive Loads:10 nF
APPLICATIONS
Multimedia
Telecom
DAA Transformer Driver
LCD Driver
Low Voltage Servo Control
Modems
FET Drivers
5-Lead SOT-23-5
(RT-5)
8-Lead SOIC
(S Suffix)REV.G
ELECTRICAL SPECIFICATIONS(@ VS = 5.0 V, VCM = 2.5 V, –40�C ≤ TA ≤ +85�C unless otherwise noted.)OUTPUT CHARACTERISTICS
ELECTRICAL SPECIFICATIONS(@ VS = �5.0 V, –40�C ≤ TA ≤ +85�C unless otherwise noted.)OUTPUT CHARACTERISTICS
DYNAMIC PERFORMANCE
NOISE PERFORMANCE
OP179/OP279–SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGSSupply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 V
Differential Input Voltage1 . . . . . . . . . . . . . . . . . . . . . . . . .±1 V
Output Short-Circuit Duration to GND . . . . . . . . . .Indefinite
Storage Temperature Range
S, RT, RU Package . . . . . . . . . . . . . . . . . .–65°C to +150°C
Operating Temperature Range
OP179G/OP279G . . . . . . . . . . . . . . . . . . . .–40°C to +85°C
Junction Temperature Range
S, RT, RU Package . . . . . . . . . . . . . . . . . . .–65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . .300°C
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the OP179/OP279 features proprietary ESD protection circuitry, permanent damage
may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
ORDERING GUIDEOP279GS
NOTESThe inputs are clamped with back-to-back diodes. If the differential input voltage
exceeds 1 volt, the input current should be limited to 5 mA.θJA is specified for the worst-case conditions, i.e., θJA is specified for device soldered
in circuit board for SOIC packages.
OP179/OP279 TPC 1.Input Offset Distribution
TPC 4.Offset Voltage vs.
Common-Mode Voltage
TPC 7.Open-Loop Gain vs.
Temperature
TPC 2.Short-Circuit Current vs.
Temperature
TPC 5.Short-Circuit Current vs.
Temperature
TPC 8.Slew Rate vs.
Temperature
TPC 3.Input Bias Current
vs. Common-Mode Voltage
TPC 6.Bandwidth vs.
Common-Mode Voltage
TPC 9.Open-Loop Gain and
Phase vs. Frequency
–Typical Performance Characteristics
TPC 10.Supply Current vs.
Temperature
TPC 13.Power Supply Rejection vs.
Frequency
TPC 16.Maximum Output Swing vs.
Frequency
TPC 11.Slew Rate vs. Temperature
TPC 14.Maximum Output
Swing vs. Frequency
TPC 17.Closed-Loop Gain vs.
Frequency
TPC 12.Open-Loop Gain and
Phase vs. Frequency
TPC 15.Closed-Loop Output
Impedance vs. Frequency
TPC 18.Small Signal Overshoot vs.
Load Capacitance
OP179/OP279
THEORY OF OPERATIONThe OP179/OP279 is the latest entry in Analog Devices’ expand-
ing family of single-supply devices, designed for the multimedia
and telecom marketplaces. It is a high output current drive,
rail-to-rail input /output operational amplifier, powered from a
single 5 V supply. It is also intended for other low supply voltage
applications where low distortion and high output current drive
are needed. To combine the attributes of high output current
and low distortion in rail-to-rail input/output operation, novel
circuit design techniques are used.
For example, TPC 1 illustrates a simplified equivalent circuit for
the OP179/OP279’s input stage. It is comprised of two PNP
differential pairs, Q5-Q6 and Q7-Q8, operating in parallel, with
diode protection networks. Diode networks D5-D6 and D7-D8
serve to clamp the applied differential input voltage to the
OP179/OP279, thereby protecting the input transistors against
avalanche damage. The fundamental differences between these
two PNP gain stages are that the Q7-Q8 pair are normally OFF
and that their inputs are buffered from the operational amplifier
inputs by Q1-D1-D2 and Q9-D3-D4. Operation is best under-
stood as a function of the applied common-mode voltage: When
the inputs of the OP179/OP279 are biased midway between the
supplies, the differential signal path gain is controlled by the
resistively loaded (via R7, R8) Q5-Q6. As the input common-mode
level is reduced toward the negative supply (VNEG or GND), the
input transistor current sources, I1 and I3, are forced into satura-
tion, thereby forcing the Q1-D1-D2 and Q9-D3-D4 networks
into cutoff; however, Q5-Q6 remain active, providing input stage
gain. On the other hand, when the common-mode input voltage
is increased toward the positive supply, Q5-Q6 are driven into
cutoff, Q3 is driven into saturation, and Q4 becomes active,
providing bias to the Q7-Q8 differential pair. The point at which
the Q7-Q8 differential pair becomes active is approximately equal
to (VPOS – 1 V).
VPOS
VNEG
IN–IN+Figure 1.OP179/OP279 Equivalent Input Circuit
The key issue here is the behavior of the input bias currents
in this stage. The input bias currents of the OP179/OP279 over
the range of common-mode voltages from (VNEG + 1V) to
(VPOS – 1V) are the arithmetic sum of the base currents in Q1-Q5
and Q9-Q6. Outside of this range, the input bias currents are
dominated by the base current sum of Q5-Q6 for input signals
close to VNEG, and of Q1-Q5 (Q9-Q6) for input signals close to
VPOS. As a result of this design approach, the input bias currents
in the OP179/OP279 not only exhibit different amplitudes, but
also exhibit different polarities. This input bias current behavior
is best illustrated in TPC 3. It is, therefore, of paramount
importance that the effective source impedances connected to
the OP179/OP279’s inputs are balanced for optimum dc and
ac performance.
TPC 19.Voltage Noise Density vs.
Frequency
1201k1M100k10k100
FREQUENCY – Hz
COMMON-MODE REJECTION
dBTPC 21.Common-Mode
Rejection vs. Frequency
TPC 20.Voltage Noise Density vs.
Common-Mode Voltage
In order to achieve rail-to-rail output behavior, the OP179/OP279
design employs a complementary common-emitter (or gmRL)
output stage (Q15-Q16), as illustrated in Figure 2. These
amplifiers provide output current until they are forced into
saturation, which occurs at approximately 50 mV from either
supply rail. Thus, their saturation voltage is the limit on the
maximum output voltage swing in the OP179/OP279. The
output stage also exhibits voltage gain, by virtue of the use of
common-emitter amplifiers; and, as a result, the voltage gain of
the output stage (thus, the open-loop gain of the device) exhib-
its a strong dependence to the total load resistance at the output
of the OP179/OP279 as illustrated in TPC 7.
Figure 2.OP179/OP279 Equivalent Output Circuit
Input Overvoltage ProtectionAs with any semiconductor device, whenever the condition
exists for the input to exceed either supply voltage, the device’s
input overvoltage characteristic must be considered. When an
overvoltage occurs, the amplifier could be damaged, depending
on the magnitude of the applied voltage and the magnitude of
the fault current. Figure 3 illustrates the input overvoltage char-
acteristic of the OP179/OP279. This graph was generated with
the power supplies at ground and a curve tracer connected to
the input. As can be seen, when the input voltage exceeds either
supply by more than 0.6 V, internal pn-junctions energize,
which allows current to flow from the input to the supplies. As
illustrated in the simplified equivalent input circuit (Figure 1),
the OP179/OP279 does not have any internal current limiting
resistors, so fault currents can quickly rise to damaging levels.
This input current is not inherently damaging to the device as
long as it is limited to 5 mA or less. For the OP179/OP279, once
the input voltage exceeds the supply by more than 0.6 V, the
input current quickly exceeds 5 mA. If this condition continues to
exist, an external series resistor should be added. The size of the
resistor is calculated by dividing the maximum overvoltage bymA. For example, if the input voltage could reach 100 V, the
external resistor should be (100 V/5 mA) = 20 kΩ. This resis-
tance should be placed in series with either or both inputs if they
are exposed to an overvoltage. Again, in order to ensure optimum
ance levels. For more information on general overvoltage charac-
teristics of amplifiers refer to the 1993 Seminar Applications Guide,
available from the Analog Devices Literature Center.
Figure 3.OP179/OP279 Input Overvoltage Characteristic
Output Phase ReversalSome operational amplifiers designed for single-supply operation
exhibit an output voltage phase reversal when their inputs are
driven beyond their useful common-mode range. Typically for
single-supply bipolar op amps, the negative supply determines
the lower limit of their common-mode range. With these devices,
external clamping diodes, with the anode connected to ground
and the cathode to the inputs, input signal excursions are pre-
vented from exceeding the device’s negative supply (i.e., GND),
preventing a condition that could cause the output voltage to
change phase. JFET input amplifiers may also exhibit phase
reversal and, if so, a series input resistor is usually required to
prevent it.
The OP179/OP279 is free from reasonable input voltage range
restrictions provided that input voltages no greater than the
supply voltages are applied. Although the device’s output will
not change phase, large currents can flow through the input
protection diodes, shown in Figure 1. Therefore, the technique
recommended in the Input Overvoltage Protection section should
be applied in those applications where the likelihood of input
voltages exceeding the supply voltages is possible.
Capacitive Load DriveThe OP179/OP279 has excellent capacitive load driving capa-
bilities. It can drive up to 10 nF directly as the performance
graph titled Small Signal Overshoot vs. Load Capacitance
(TPC 18) shows. However, even though the device is stable, a
capacitive load does not come without a penalty in bandwidth.
As shown in Figure 4, the bandwidth is reduced to under 1 MHz
for loads greater than 3 nF. A “snubber” network on the output
will not increase the bandwidth, but it does significantly reduce
the amount of overshoot for a given capacitive load. A snubber
consists of a series R-C network (RS, CS), as shown in Figure 5,
connected from the output of the device to ground. This net-
work operates in parallel with the load capacitor, CL, to provide
phase lag compensation. The actual value of the resistor and
capacitor is best determined empirically.
OP179/OP279Figure 4.OP179/OP279 Bandwidth vs. Capacitive Load
Figure 5.Snubber Network Compensates for Capacitive
Load
The first step is to determine the value of the resistor, RS. A
good starting value is 100 Ω (typically, the optimum value will
be less than 100 Ω). This value is reduced until the small-signal
transient response is optimized. Next, CS is determined—10 µF
is a good starting point. This value is reduced to the smallest
value for acceptable performance (typically, 1 µF). For the case
of a 10 nF load capacitor on the OP179/OP279, the optimal
snubber network is a 20 Ω in series with 1 µF. The benefit is
immediately apparent as seen in the scope photo in Figure 6.
The top trace was taken with a 10 nF load and the bottom trace
with the 20 Ω, 1 µF snubber network in place. The amount of
overshot and ringing is dramatically reduced. Table I illustrates a
few sample snubber networks for large load capacitors.
Figure 6.Overshoot and Ringing Are Reduced by Adding
a “Snubber” Network in Parallel with the 10 nF Load
Table I.Snubber Networks for Large Capacitive Loads
Overload Recovery TimeOverload, or overdrive, recovery time of an operational amplifier
is the time required for the output voltage to recover to its linear
region from a saturated condition. This recovery time is impor-
tant in applications where the amplifier must recover after a
large transient event. The circuit in Figure 7 was used to
evaluate the OP179/OP279’s overload recovery time. The
OP179/OP279 takes approximately 1 µs to recover from positive
saturation and approximately 1.2 µs to recover from negative
saturation.
Figure 7.Overload Recovery Time Test Circuit
Output Transient Current RecoveryIn many applications, operational amplifiers are used to provide
moderate levels of output current to drive the inputs of ADCs,
small motors, transmission lines and current sources. It is in these
applications that operational amplifiers must recover quickly to
step changes in the load current while maintaining steady-state
load current levels. Because of its high output current capability
and low closed-loop output impedance, the OP179/OP279 is an
excellent choice for these types of applications. For example,
when sourcing or sinking a 25 mA steady-state load current, the
OP179/OP279 exhibits a recovery time of less than 500 ns to
0.1% for a 10 mA (i.e., 25 mA to 35 mA and 35 mA to 25 mA)
step change in load current.
A Precision Negative Voltage ReferenceIn many data acquisition applications, the need for a precision
negative reference is required. In general, any positive voltage
reference can be converted into a negative voltage reference
through the use of an operational amplifier and a pair of matched
resistors in an inverting configuration. The disadvantage to that
approach is that the largest single source of error in the circuit is
the relative matching of the resistors used.
The circuit illustrated in Figure 8 avoids the need for tightly
matched resistors with the use of an active integrator circuit. In
this circuit, the output of the voltage reference provides the
input drive for the integrator. The integrator, to maintain circuit
equilibrium, adjusts its output to establish the proper relation-
ship between the reference’s VOUT and GND. Thus, various
negative output voltages can be chosen simply by substituting
