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OP270EZ
Dual Very Low Noise Precision Operational Amplifier
REV. C
Dual Very Low Noise Precision
Operational Amplifier
FEATURES
Very Low Noise5 nV/÷÷÷÷÷Hz @ 1
kHz Max
Excellent Input Offset Voltage 75 �V Max
Low Offset Voltage Drift1�V/�C Max
Very High Gain 1500 V/mV Min
Outstanding CMR 106 dB Min
Slew Rate 2.4 V/�s Typ
Gain Bandwidth Product5 MHz Typ
Industry-Standard 8-Lead Dual Pinout
SIMPLIFIED SCHEMATIC
(One of Two Amplifiers Is Shown)
GENERAL DESCRIPTIONThe OP270 is a high performance, monolithic, dual operational
amplifier with exceptionally low voltage noise, 5 nV/÷Hz max at
1 kHz. It offers comparable performance to ADI’s industry
standard OP27.
The OP270 features an input offset voltage below 75 mV and an
offset drift under 1 mV/∞C, guaranteed over the full military tem-
perature range. Open-loop gain of the OP270 is over 1,500,000
into a 10kW load, ensuring excellent gain accuracy and linearity,
even in high gain applications. Input bias current is under 20nA,
which reduces errors due to signal source resistance. The OP270’s
CMR of over 106dB and PSRR of less than 3.2 mV/V signifi-
cantly reduce errors due to ground noise and power supply
fluctuations. Power consumption of the dual OP270 is one-third
less than two OP27s, a significant advantage for power conscious
applications. The OP270 is unity-gain stable with a gain bandwidth
product of 5 MHz and a slew rate of 2.4 V/ms.
The OP270 offers excellent amplifier matching, which is important
for applications such as multiple gain blocks, low noise instru-
mentation amplifiers, dual buffers, and low noise active filters.
The OP270 conforms to the industry-standard 8-lead DIP pinout.
It is pin compatible with the MC1458, SE5532/A, RM4558, and
HA5102 dual op amps, and can be used to upgrade systems
using those devices.
For higher speed applications, the OP271, with a slew rate of
8V/ms, is recommended. For a quad op amp, see the OP470.
CONNECTION DIAGRAMS
16-Lead SOIC
(S-Suffix)
8-Lead PDIP (P-Suffix)
8-Lead CERDIP
(Z-Suffix)
(VS =�15
V, TA=25�C, unless otherwise noted.)OP270–SPECIFICATIONSInput Noise
Large-Signal
Power Supply
Input Capacitance
Input Resistance
NOTES
1. Guaranteed but not 100% tested.
2. Sample tested.
3. Guaranteed by CMR test.
Specifications subject to change without notice.
ELECTRICAL SPECIFICATIONSSPECIFICATIONSOP270
(Vs =�15
V, –40∞C£
TA£
85�C, unless otherwise noted.)* Guaranteed by CMR test.
Specifications subject to change without notice.
OP270
ABSOLUTE MAXIMUM RATINGS1Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±18 V
Differential Input Voltage2 . . . . . . . . . . . . . . . . . . . . . .±1.0 V
Differential Input Current2 . . . . . . . . . . . . . . . . . . . .±25 mA
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . .Supply Voltage
Output Short-Circuit Duration . . . . . . . . . . . . . . .Continuous
Storage Temperature Range
P, S, Z Package . . . . . . . . . . . . . . . . . . . .–65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . .300°C
Junction Temperature (TJ) . . . . . . . . . . . . .–65°C to +150°C
ORDERING GUIDE*θJA is specified for worst-case mounting conditions, i.e., θJA is specified for device
in socket for CERDIP and PDIP packages; θJA is specified for device soldered to
printed circuit board for SOIC package.
Operating Temperature Range
OP270E, OP270F, OP270G . . . . . . . . . . .–40°C to +85°C
NOTESStresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.The OP270’s inputs are protected by back-to-back diodes. Current limiting
resistors are not used, in order to achieve low noise performance. If differential
voltage exceeds +10 V, the input current should be limited to ±25mA.
For military processed devices, please refer to the Standard
Microcircuit Drawing (SMD) available at
www.dscc.dla.mil/programs/milspec/default.asp.
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the OP270 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
TPC 1. Voltage Noise Density
vs. Frequency
TPC 4. Current Noise Density
vs. Frequency
TEMPERATURE (�C)
INPUT BIAS CURRENT (nA)
VS = �15V
VCM = 0V
–252575TPC 7. Input Bias Current vs.
Temperature
TPC 2. Voltage Noise Density
vs. Supply Voltage
TPC 5. Input Offset Voltage vs.
Temperature
TEMPERATURE (�C)
INPUT OFFSET CURRENT (nA)
–252575TPC 8. Input Offset Current vs.
Temperature
TPC 3. 0.1 Hz to 10 Hz Input
Voltage Noise
TIME (Minutes)
CHANGE IN OFFSET
GE (
12345TPC 6. Warm-Up Offset Voltage
Drift
TPC 9. Input Bias Current vs.
Common-Mode Voltage
OP270
FREQUENCY (Hz)
CMR (dB)
1101001k10k100k1M
100TPC 10. CMR vs. Frequency
FREQUENCY (Hz)
PSR (dB)
140110010k1M100M1k100k10M
–PSR
+PSRTPC 13. PSR vs. Frequency
TPC 16. Open-Loop Gain Phase
Shift vs. Frequency
SUPPLY VOLTAGE (V)
L SUPPL
Y CURRENT (mA)�5�10�15�20
+125�C
+25�C
–55�CTPC 11. Total Supply Current
vs. Supply Voltage
FREQUENCY (Hz)
LTA
GE GAIN (dB)
140110010k1M100M1k100k10M
120TPC 14. Open-Loop Gain vs.
Frequency
SUPPLY VOLTAGE (V)
OPEN-LOOP GAIN (V/mV)
4000�10�15�20�25
TPC 17. Open-Loop Gain vs.
Supply Voltage
TPC 12. Total Supply Current
vs. Temperature
FREQUENCY (Hz)
CLOSED-LOOP GAIN (dB)
–201k10k
100k10MTPC 15. Closed-Loop Gain vs.
Frequency
TEMPERATURE (�C)
PHASE MARGIN (Degrees)–75
GAIN B
AND
WIDTH PR
ODUCT (MHz)TPC 18. Gain-Bandwidth Phase
Margin vs. Temperature
TPC 19. Maximum Output
Swing vs. Frequency
FREQUENCY (Hz)
OUTPUT IMPED
ANCE (1k100k10M
10k1M
AV = 100TPC 22. Output Impedance vs.
Frequency
FREQUENCY (Hz)
DIST
TION (%)
0.0011010k
AV = 10
AV = 1TPC 25. Total Harmonic Distor-
tion vs. Frequency
LOAD RESISTANCE (�)
MAXIMUM OUTPUT ( 1k10k100kTPC 20. Maximum Output
Voltage vs. Load Resistance
TEMPERATURE (�C)
SLEW RA
TE (V/
2.7TPC 23. Slew Rate vs.
Temperature
TPC 26. Large Signal Transcient
Response
CAPACITIVE LOAD (pF)
VERSHOO
T (%)04001000
200600800TPC 21. Small-Signal Overshoot
vs. Capacitive Load
FREQUENCY (Hz)
CHANNEL SEP
ARA
TION (dB)11k1M
10k
100100k10
160TPC 24. Channel Separation vs.
Frequency
TPC 27. Small-Signal
Transient Response
OP270Figure 1. Channel Separation Test Circuit
Figure 2. Burn-In Circuit
APPLICATIONS INFORMATION
VOLTAGE AND CURRENT NOISEThe OP270 is a very low noise dual op amp, exhibiting atypical
voltage noise of only 3.2nV/÷÷÷÷÷Hz @ 1 kHz. The exceptionally
low noise characteristic of the OP270 is achieved in part by
operating the input transistors at high collector currents since
the voltage noise is inversely proportional to the square root of
the collector current. Current noise, however, is directly propor-
tional to the square root of the collector current. As a result, the
outstanding voltage noise performance of the OP270 is gained
at the expense of current noise performance, which is normal for
low noise amplifiers.
To obtain the best noise performance in a circuit, it is vital to
understand the relationship between voltage noise (en), current
noise (in), and resistor noise (et).
TOTAL NOISE AND SOURCE RESISTANCEThe total noise of an op amp can be calculated by:
where:
En = total input referred noise
en = op amp voltage noise
in = op amp current noise= source resistance thermal noise= source resistance
The total noise is referred to the input and at the output would
be amplified by the circuit gain.
Figure 3 shows the relationship between total noise at 1kHz
and source resistance. For RS < 1kW the total noise is dominated
by the voltage noise of the OP270. As RS rises above 1 kW, total
noise increases and is dominated by resistor noise rather than by
the voltage or current noise of the OP270. When RS exceedskW, current noise of the OP270 becomes the major contributor
to total noise.
Figure 3. Total Noise vs. Source Resistance
(Including Resistor Noise) at 1 kHz
Figure 4 also shows the relationship between total noise and
source resistance, but at 10Hz. Total noise increases more
quickly than shown in Figure 3 because current noise is inversely
proportional to the square root of frequency. In Figure 4, current
noise of the OP270 dominates the total noise when RS > 5 kW.
Figures 3 and 4 show that to reduce total noise, source resistance
must be kept to a minimum. In applications with a high source
resistance, the OP200, with lower current noise than the OP270,
will provide lower total noise.
