OMAP3530DCUS ,Applications Processor 423-FCBGA 0 to 90Features10 MPoly/sec– Byte-Addressable (8-, 16-, 32-, and 64-Bit• Universal Scalable Shader Engine: ..
OMAP3530DCUSA ,Applications Processor 423-FCBGA -40 to 105Associative) • Luma and Chroma Separate Video (S-Video)– 16-KB Data Cache (4-Way Set-Associative)– ..
OMAP3530ECUS ,Applications Processor 423-FCBGA 0 to 90 SPRS507H–FEBRUARY 2008–REVISED OCTOBER 2013• 65-nm CMOS Technologies .65-mm Ball Pitch (Top), .5-m ..
OMAP4460 , Multimedia Device Engineering Sample ES1.0 ES1.1 Version A
OMAP5910JGDY1 , Applications Processor
OMAP5910JGDY2 ,Applications Processor
P2001 , LINE MATCHING TRANSFORMER
P2005AF-08SR , Low Frequency EMI Reduction IC
P2027A , General Purpose EMI Reduction IC
P2027A , General Purpose EMI Reduction IC
P2027A-08TR , General Purpose EMI Reduction IC
P2033 , SMT GATE DRIVE TRANSFORMERS 1500VDC Basic and Operational Insulation
OMAP3530DCUS-OMAP3530DCUSA-OMAP3530ECUS
Applications Processor
OMAP3530, OMAP3525
www.ti.com SPRS507H –FEBRUARY 2008–REVISED OCTOBER 2013
OMAP3530 and OMAP3525 Applications Processors
Checkfor Samples: OMAP3530, OMAP3525 OMAP3530 and OMAP3525 Applications Processors
1.1 Features Protected Mode Operation• OMAP3530 and OMAP3525 Devices: Exceptions Support for Error Detection– OMAP™3 Architecture and Program Redirection– MPU Subsystem • Hardware Support for Modulo Loop• Upto 720-MHz ARM® Cortex™-A8 Core Operation• NEON™ SIMD Coprocessor • C64x+ L1 andL2 Memory Architecture– High-Performance Image, Video, Audio – 32KBof L1P Program RAM and Cache(IVA2.2™) Accelerator Subsystem (Direct Mapped)• Upto 520-MHz TMS320C64x+™ DSP Core – 80KBof L1D Data RAM and Cache (2-Way• Enhanced Direct Memory Access (EDMA) Set-Associative)Controller (128 Independent Channels) – 64KBof L2 Unified Mapped RAM and Cache• Video Hardware Accelerators (4-Way Set-Associative)– PowerVR® SGX™ Graphics Accelerator – 32KBof L2 Shared SRAM and 16KBof L2(OMAP3530 Device Only) ROM• Tile-Based Architecture Delivering upto • C64x+ Instruction Set Features10 MPoly/sec – Byte-Addressable (8-, 16-, 32-, and 64-Bit• Universal Scalable Shader Engine: Multi- Data)threaded Engine Incorporating Pixel and – 8-Bit Overflow ProtectionVertex Shader Functionality – Bit Field Extract, Set, Clear• Industry Standard API Support: – Normalization, Saturation, Bit-CountingOpenGLES 1.1 and 2.0, OpenVG1.0 Compact 16-Bit Instructions• Fine-Grained Task Switching, Load
Balancing, and Power Management – Additional Instructionsto Support Complex
Multiplies• Programmable High-Quality Image Anti-
Aliasing • ARM Cortex-A8 Core Fully Software-Compatible with C64x and – ARMv7 Architecture
ARM9™ • TrustZone® Commercial and Extended Temperature • Thumb®-2 • MMU Enhancements (VLIW) – In-Order, Dual-Issue, Superscalar Core Microprocessor Core Functional Units – NEON Multimedia Architectureof ARMv6 SIMD 8-Bit – Supports Both Integer and Floating-Point SIMD16x 16-Bit – Jazelle® RCT Execution EnvironmentMultiplies Clock Architecture (16-Bit – Dynamic Branch with Target Address Global Nonaligned Buffer, and Stack – Embedded Support for Noninvasive Debug Code Size • ARM Cortex-A8 Memory Architecture:
