OMAP3525DZCBC ,OMAP3525-HiRel Applications Processor 515-POP-FCBGA -40 to 90– Embedded Trace Macrocell (ETM) Support – Parallel Digital Outputfor Non-Invasive Debug• Up to 24- ..
OMAP3530DCUS ,Applications Processor 423-FCBGA 0 to 90Features10 MPoly/sec– Byte-Addressable (8-, 16-, 32-, and 64-Bit• Universal Scalable Shader Engine: ..
OMAP3530DCUSA ,Applications Processor 423-FCBGA -40 to 105Associative) • Luma and Chroma Separate Video (S-Video)– 16-KB Data Cache (4-Way Set-Associative)– ..
OMAP3530ECUS ,Applications Processor 423-FCBGA 0 to 90 SPRS507H–FEBRUARY 2008–REVISED OCTOBER 2013• 65-nm CMOS Technologies .65-mm Ball Pitch (Top), .5-m ..
OMAP4460 , Multimedia Device Engineering Sample ES1.0 ES1.1 Version A
OMAP5910JGDY1 , Applications Processor
P2001 , LINE MATCHING TRANSFORMER
P2005AF-08SR , Low Frequency EMI Reduction IC
P2027A , General Purpose EMI Reduction IC
P2027A , General Purpose EMI Reduction IC
P2027A-08TR , General Purpose EMI Reduction IC
P2033 , SMT GATE DRIVE TRANSFORMERS 1500VDC Basic and Operational Insulation
OMAP3525DZCBC
OMAP3525-HiRel Applications Processor
OMAP3525-HiRel, OMAP3530-HiRel
www.ti.com SPRS599D–JUNE 2009–REVISED AUGUST 2010
OMAP3525-HiRel and OMAP3530-HiRel Applications Processor
Checkfor Samples: OMAP3525-HiRel, OMAP3530-HiRel OMAP3525-HiRel and OMAP3530-HiRel Applications Processor
1.1 Features
1234 Instruction Packing Reduces Code Size• OMAP325 and OMAP3530 Applications
Processor: – All Instructions Conditional OMAP™3 Architecture – Additional C64x+™ Enhancements MPU Subsystem • Protected Mode Operation Upto 600-MHz ARM Cortex™-A8 Core • Exceptions Support for Error Detection
and Program Redirection• NEON™ SIMD Coprocessor Hardware Support for Modulo Loop– High Performance Image, Video, Audio Operation(IVA2.2™) Accelerator Subsystem C64x+ L1/L2 Memory Architecture• Upto 520-MHz TMS320C64x+™ DSP Core 32K-Byte L1P Program RAM/Cache (Direct• Enhanced Direct Memory Access (EDMA) Mapped)Controller (128 Independent Channels) 80K-Byte L1D Data RAM/Cache (2-Way• Video Hardware Accelerators
Set-Associative)– POWERVR SGX™ Graphics Accelerator – 64K-ByteL2 Unified Mapped RAM/Cache(OMAP3530 Device Only) (4-Way Set-Associative)• Tile Based Architecture Delivering upto – 32K-ByteL2 Shared SRAM and 16K-Byte L210 MPoly/sec ROM• Universal Scalable Shader Engine: • C64x+ Instruction Set FeaturesMulti-threaded Engine Incorporating Pixel
and Vertex Shader Functionality – Byte-Addressable (8-/16-/32-/64-Bit Data) Industry Standard API Support: – 8-Bit Overflow Protection
OpenGLES 1.1 and 2.0, OpenVG1.0 – Bit-Field Extract, Set, Clear Fine Grained Task Switching, Load – Normalization, Saturation. Bit-CountingBalancing, and Power Management – Compact 16-Bit Instructions• Programmable High Quality Image – Additional Instructionsto Support ComplexAnti-Aliasing Multiplies– Fully Software-Compatible With C64x and • ARM Cortex™-A8 CoreARM9™ – ARMv7 Architecture Temperature • Trust Zone® • Thumb®-2 (VLIW) • MMU Enhancements Core Superscalar Core – NEON™ Multimedia 8-Bit – Over2x Performance Supports Both Integer and Floating• Two Multipliers16x 16-Bit SIMD per Clock Jazelle® RCT Execution Environment (16-Bit
Architecture Dynamic Branch with Branch Non-Aligned
Target Address Cache, Global History
Buffer, and 8-Entry Return Stack
