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NX5DV715HF
Dual supply 1-of-2 VGA switch
1. General description
The NX5DV715 is a dual supply 1-to-2 VGA switch. It integrates high-bandwidth SPDT
switches with level-translating buffers and level translating switches to provide switching
of input RGB, H-Sync, V-Sync and DDC signals to either of two output channels.
The NX5DV715 is characterized for operation from 40 Cto+85 C.
2. Features and benefits RGB switches: Low ON resistance (4  typical) Low ON capacitance (12 pF typical) Low output skew (50 ps) Low power consumption (< 2 A) Level translation of sync and DDC signals Over-voltage tolerant inputs ESD protection: HBM JESD22-A114F Class 3A exceeds 4 kV MM JESD22-A115-A exceeds 200V CDM JESD22-C101D exceeds 1000V IEC61000-4-2 contact discharge exceeds 4 kV for I/Os Specified from 40 Cto+85C
3. Applications Notebook Computers Docking stations Digital projectors Computer monitors Servers Storage
NX5DV715
Dual supply 1-of-2 VGA switch
Rev. 3 — 4 November 2011 Product data sheet
NXP Semiconductors NX5DV715
Dual supply 1-of-2 VGA switch
4. Ordering information
5. Functional diagram
Table 1. Ordering information
NX5DV715HF 40 Cto +85C HWQFN32 plastic thermal enhanced very very thin quad flat
package; no leads; 32 terminals; body 3  6 0.75 mm
SOT1180-1
NXP Semiconductors NX5DV715
Dual supply 1-of-2 VGA switch
6. Pinning information
6.1 Pinning
6.2 Pin description
Table 2. Pin description
R0, G0, B0 1, 2, 5 RGB input or output
GND 3, 11, 28, 31 ground (0V)
VCC(A) 4, 23, 32 supply voltage A 6 horizontal sync input 7 vertical sync input 8 enable input (active HIGH)
SDA0 9 SDA0 input or output
SCL0 10 SCL0 input or output
SDA1, SDA2 12, 13 SDA input or output
SCL1, SCL2 14, 15 SCL input or output
VCC(B) 16 supply voltage B
V1, V2 18, 17 vertical sync output
H1, H2 20, 19 horizontal sync output
NXP Semiconductors NX5DV715
Dual supply 1-of-2 VGA switch
[1] Test pin used to enable test mode. For normal usage, this pin must be connected to VCC(A).
7. Functional description
The NX5DV715 integrates high-bandwidth SPDT switches, level-translating buffers and
level translating SPDT switches to provide a complete solution for 1-to-2 switching of VGA
signals. An enable input (EN) is used to enable or disable the device and a select input
(SEL) is used to determine which output is selected. When EN = LOW the device is
disabled; all switches will be off, pull-up resistors will be disabled and H1, V1, H2, V2 will
be forced LOW.
7.1 RGB switches
The NX5DV715 provides three identical single pole double throw high-bandwidth switches
to route standard VGA RGB signals (see Table3).
7.2 H-Sync/V-Sync level translator
The horizontal and vertical synchronization buffers have inputs (H0, V0) referenced to
VCC(A) and outputs (H1, V1 and H2, V2) that are referenced to VCC(B). This allows level
translation of synchronization signals from as low as 2.0 V up to 5.5 V and supports
low-voltage CMOS or TTL-compatible graphics controllers meeting the VESA
specification for output drive of 8 mA. The EN input also controls the level shifter (See
Table 4).
R1, G1, B1, R2, G2, B2 27, 25, 22, 26, 24, 21 RGB input or output
TEST[1] 29 test pin (active LOW)
SEL 30 select input
Table 2. Pin description …continued
Table 3. Function table RGB= HIGH voltage level; L= LOW voltage level; X= Don’t care. L R0 to R1; G0 to G1; B0 to B1 H R0 to R2; G0 to G2; B0 to B2 X switches Rn, Gn, Bn off
Table 4. Function table HV= HIGH voltage level; L= LOW voltage level; X= Don’t care. L H1 = H0; V1 = V0; H2, V2 = L H H2 = H0; V2 = V0; H1, V1 = L L
NXP Semiconductors NX5DV715
Dual supply 1-of-2 VGA switch
7.3 Display-Data Channel Multiplexer
The NX5DV715 provides two identical SPDT active-level translating switches to route
DDC signals (See Table 5). The switch outputs are limited to a diode drop less than the
voltage applied on VCC(A). To provide VESA I2 C-compatible signals 3.3 V should be
applied to VCC(A). If voltage translation is not required VCC(A) should be connected to
VCC(B). Switch terminals include integrated pull-up resistors; inputs (SDA0, SCL0) are
pulled up to VCC(A), outputs (SDA1, SCL1 and SDA2, SCL2) are pulled up to VCC(B). When
the NX5DV715 is disabled (EN = LOW), the pull-up resistors are also disabled.
8. Limiting values
[1] The minimum input voltage rating may be exceeded if the input current rating is observed.
[2] For HWQFN32 package: above 137 C the value of Ptot derates linearly with 20.5 mW/K.
Table 5. Function table DDC= HIGH voltage level; L= LOW voltage level; X= Don’t care. L SDA0 to SDA1, SCL0 to SCL1 H SDA0 to SDA2, SCL0 to SCL2 X switches SDAn, SCLn off
Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
VCC(A) supply voltage A 0.5 +6 V
VCC(B) supply voltage B 0.5 +6 V input voltage [1] 0.5 +6 V
VSW switch voltage [1] 0.5 +6 V
IIK input clamping current VI< 0.5V 50 - mA
ISK switch clamping current VI< 0.5V 50 - mA
IOK output clamping current VO <0V 50 - mA output current VO =0VtoVCC(B) - 50 mA
ICC supply current ICC(A) or ICC(B) - 100 mA
IGND ground current 100 - mA
ISW switch current VSW> 0.5 V or VSW < 6 V;
sourceor sink current 30 mA
VSW> 0.5 V or VSW < 6 V; pulsedat1ms duration, < 10 % duty cycle;
peak current 90 mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb= 40 Cto+85C [2]- 250 mW
NXP Semiconductors NX5DV715
Dual supply 1-of-2 VGA switch
9. Recommended operating conditions
[1] Applies to control signal levels.
10. Static characteristics
Table 7. Recommended operating conditions
VCC(A) supply voltage A 2 3.3 5.5 V
VCC(B) supply voltage B 4.5 5.0 5.5 V
Tamb ambient temperature operating in free-air 40 +25 +85 C
t/V input transition rise and fall rate VCC(A) = 2.3 V to 2.7V [1] -20 - ns/V
VCC(A) = 3 V to 3.6V [1] -10 - ns/V
VCC(A) = 4.5 V to 5.5V [1]- 5 - ns/V
Table 8. Static characteristics
VCC(B) = 4.5 V to 5.5 V; VCC(A) = 2 V to 5.5 V, unless otherwise specified; Voltages are referenced to GND (ground = 0V)
General
ICC(A) supply current A VCC(A) = 3.3 V; EN = VCC(A) or GND;
for H1, H2, V1, V2: IO = 0 A;
SCLn, SDAn unconnected 2.0 A
ICC(B) supply current B VCC(B) = 5.0 V; EN = VCC(A) or GND;
for H1, H2, V1, V2: IO = 0 A;
SCLn, SDAn unconnected 2.0 A
HV buffer
VIH HIGH-level input voltage VCC(A) =3Vto3.6V 2 - - V
VIL LOW-level input voltage VCC(A) =3Vto3.6V - - 0.8 V hysteresis voltage - 50 - mV input leakage current VCC(B) =VCC(A) =5.5V; =GNDto VCC(A) 1 A
VOH HIGH-level output voltageIO= 8 mA VCC(B) 
0.5 V
VOL LOW-level output voltage IO =8 mA - - 0.5 V
IOFF power-off leakage current VI or VO = 0 V to 5.5 V; VCC(B) = 0 V;
VCC(A) = 0 V to 5.5 V 1 A
RGB switches
IS(OFF) OFF-state leakage
current
VCC(B)= 5.5 V; VI= 0.3 V or 5.5 V; =0 V to VCC(B); EN= VCC(A) or GND;
See Figure3 1 A
IS(ON) ON-state leakage current VCC(B)= 5.5 V; VI= 0.3 V or 5.5 V; =0 V to VCC(B); EN= VCC(A);
See Figure4 1 A
RON ON resistance VI= 0.7 V; ISW= 10 mA; See Figure5
and Figure6
[4] -4 - 
NXP Semiconductors NX5DV715
Dual supply 1-of-2 VGA switch
[1] All typical values are measured at VCC(B) =5V, VCC(A)= 3.3 V and Tamb =25 C unless otherwise specified.
[2] Measured at identical VCC, temperature and input voltage.
[3] Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical VCC and
temperature.
[4] Guarantees the LOW level.
[5] Guarantees the HIGH level.
RON ON resistance mismatch
between channels= GNDto 0.7 V; ISW= 10 mA [2] -0.5 - 
RON(flat) ON resistance (flatness) VI= GNDto 0.7 V; ISW= 10 mA [3] -0.5 - 
CS(OFF) OFF-state capacitance - 4.5 - pF
CS(ON) ON-state capacitance - 12 - pF
SDAn, SCLn
IS(OFF) OFF-state leakage
current
VCC(B)= 5.5 V; VCC(A)= 3.6 V; SCL0,
SDA0, SCL1, SCL2, SDA1, SDA2 =
VCC(A) or GND; VO=0 V to VCC(B); = GND; See Figure3
[5] -- 1 A
RON ON resistance VCC(A) =2 V; VI= 0.4 V; ISW= 2mA;
See Figure 5 and Figure7 - 
CS(ON) ON-state capacitance - 15 - pF
RPU pull-up resistance - 4.7 - k
Control Logic (SEL, EN)
VIH HIGH-level input voltage VCC(A) = 2.3 V to 2.7V 1.7 - V
VCC(A) = 3.0 V to 3.6V 2.0 - V
VCC(A) = 4.5 V to 5.5V 0.7VCC(A) -V
VIL LOW-level input voltage VCC(A) = 2.3 V to 2.7V - - 0.7 V
VCC(A) = 3.0 V to 3.6V - - 0.8 V
VCC(A) = 4.5 V to 5.5V - - 0.3VCC(A) V hysteresis voltage - 50 - mV input leakage current VCC(A)= 5.5 V; VI =GNDto VCC(A) -- 1 A
Table 8. Static characteristics …continued
VCC(B) = 4.5 V to 5.5 V; VCC(A) = 2 V to 5.5 V, unless otherwise specified; Voltages are referenced to GND (ground = 0V)
NXP Semiconductors NX5DV715
Dual supply 1-of-2 VGA switch
10.1 Test circuits and waveforms
NXP Semiconductors NX5DV715
Dual supply 1-of-2 VGA switch
NXP Semiconductors NX5DV715
Dual supply 1-of-2 VGA switch
11. Dynamic characteristics
[1] All typical values are measured at VCC(B) =5V; VCC(A)= 3.3 V; Tamb =25C.
[2] tpd is the same as tPLH and tPHL.
[3] Guaranteed by design.
Table 9. Dynamic characteristics
At recommended operating conditions; Voltages are referenced to GND (ground = 0 V; VCC(B) = 4.5 V to 5.5 V;
VCC(A)=2Vto 5.5 V.
tpd propagation delay H0 to H1, H2 and V0 to V1, V2;
See Figure 8 and Figure9
[2] -3- ns
ten enable time EN and SEL to all other outputs;
See Figure 10 and Figure11
-15- ns
tdis disable time EN and SEL to all other outputs;
See Figure 10 and Figure11
-5- ns
tb-m break-before-make
time
See Figure12 -10- ns
tsk(o) output skew time Skew between any Rn, Gn and Bn
ports; see Figure8
[3] -50- ps

Partno	Mfg	Dc	Qty	Available	Descript
NX5DV715HF	NXP	N/a	11	avai	Dual supply 1-of-2 VGA switch