NTHS5404T1 ,Power MOSFET 20V, 5.2A, N-Channel ChipFET™2REV. AAND8044/D160Single EVB120Min. Footprint80401” Square PCB0–5 –4 –3 –2 –110 10 10 10 10 1 10 1 ..
NTHS5404T1G ,Power MOSFET 20V, 5.2A, N-Channel ChipFET™Maximum ratings are 95C/W for the 1206–8In this example, a 45C/W reduction was achieved withoutve ..
NTHS5441 ,−20 V, −5.3 A, P−Channel ChipFETELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)JCharacteristic Symbol Test Condition M ..
NTHS5441T1 ,Power MOSFET P-Channel ChipFET™ -3.9 A, -20 VELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)JCharacteristic Symbol Test Condition M ..
NTHS5441T1G ,Power MOSFET P-Channel ChipFET™ -3.9 A, -20 VAND8044/DSingle-Channel 1206AChipFET Power MOSFETRecommended Pad Patternand Thermal Performance
NTHS5443 ,Power MOSFET 20V, 3.6A, P-Channel ChipFET™APPLICATION NOTEINTRODUCTION 0.0054 sq. in. or 3.51 sq. mm. This will assist the powerNew ON Semico ..
OV7740 , ultra-high sensitivity CMOS image sensor
OV7949 , high-performance security CameraChip sensor
OV7950 , ultra-compact, high-performance automotive CameraChip sensor
OV9625 , OV9625 Color CMOS SXGA (1.3 MPixel) CAMERACHIP OV9121 B&W CMOS SXGA (1.3 MPixel) CAMERACHIP
OV9655 , ultimate 1/4 inch camera-on-a-chip
OV9715 , High-Performance Video for Automotive Vision Applications
NTHS5404T1-NTHS5404T1G-NTHS5441T1G-NTHS5443-NTHS5443T1-NTHS5443T1G
Power MOSFET Dual P-Channel ChipFET™ 2.1 A, 20 V
APPLICATION NOTEINTRODUCTION 0.0054 sq. in. or 3.51 sq. mm. This will assist the powerNew ON Semiconductor ChipFETs in the leadless dissipation path away from the device (through the copper1206A package feature the same outline as popular 1206A leadframe) and into the board and exterior chassis (ifresistors and capacitors but provide all the performance of applicable) for the single device. The addition of a furthertrue power semiconductor devices. The 1206A ChipFET copper area and/or the addition of vias to other board layershas the same footprint as the body of the TSOP–6 and can will enhance the performance still further. An example ofbe thought of as a leadless TSOP–6 for purposes of this method is implemented on the Evaluation Boardvisualizing board area, but its thermal performance bears described in the next section (Figure 4).comparison with the much large SO–8.This technical note discusses the single–channel 80 milChipFET 1206A pin–out, package outline, pad patterns,28 milevaluation board layout and thermal performance.PIN–OUT1 825 milFigure 1 shows the pin–out description and Pin 1identification for the single–channel 1206A ChipFET 2 7device. The pin–out is similar to the TSOP–63 6configuration, with two additional drain pins to enhancepower dissipation and thermal performance. The legs of the18 mil4 5device are very short, again helping to reduce the thermalpath to the external heatsink/pcb and allowing a larger dieto be fitted in the device if necessary.26 milSTYLE 1:Figure 2. Basic Pad LayoutPIN 1. DRAIN8 2. DRAIN 3. DRAIN 4. GATE80 mil 5. SOURCE 6. DRAIN1 7. DRAIN 8. DRAIN1 868 milFigure 1. Single 1206A ChipFET2 73 6BASIC PAD PATTERNSThe basic pad layout with dimensions is shown in4 5Figure 2. This is sufficient for low power dissipationMOSFET applications, but power semiconductor26 milperformance requires a greater copper pad area, particularly28 milfor the drain leads.The minimum recommended pad pattern, shown inFigure 3. Minimum Recommended Pad PatternFigure 3, improves the thermal area of the drainconnections (pins 1, 2, 3, 6, 7, 8) while remaining within theconfines of the basic footprint. The drain copper area is Semiconductor Components Industries, LLC, 20011 Publication Order Number:February, 2001 – Rev.0 AN8044/DAND8044/DEVALUATION BOARD FOR THE SINGLE 1206A 8–pin DIP, which will allow test sockets to be used to assistThe ChipFET 1206A evaluation board measures 0.6 in in testing.by 0.5 in. Its copper pad pattern consists of an increased pad The thermal performance of the 1206A on this board hasarea around the six drain leads on the top–side – been measured with the results following on the next page.approximately 0.0482 sq. in. 31.1 sq. mm – and vias added The testing included comparison with the minimumthrough to the underside of the board, again with a recommended footprint on the evaluation board–size pcbmaximized copper pad area of approximately the and the industry standard one–inch square FR4 pcb withboard–size dimensions. The outer package outline is for the copper on both sides of the board.Front of Board Back of BoardCHIPFETChipFETD DD DD DG S1206AFigure 4. Evaluation BoardTHERMAL PERFORMANCE thermal performance out to steady state and produce agraphic account of how an increased copper pad area for theJunction–to–Foot Thermal Resistance drain connections can enhance thermal performance. The(the Package Performance)measured steady state values of R for the single 1206AJAθThermal performance for the 1206A ChipFET measuredChipFET are:as junction–to–foot thermal resistance is 15C/W typical,20C/W maximum for the single device. The “foot” is theÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑMinimum recommended pad pattern (see Figure 3) 156C/Wdrain lead of the device as it connects with the body. Thison the evaluation board size of 0.5 in. x 0.6 in.ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑis identical to the SO–8 package R performance, a featJFθThe evaluation board with the pad pattern described 111C/Wmade possible by shortening the leads to the point whereÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑon Figure 4they become only a small part of the total footprint area.ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑIndustry standard 1″ square pcb with maximum 78C/WÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑJunction–to–Ambient Thermal Resistancecopper both sides.(dependent on pcb size)ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑThe R typical for the single–channel 1206A ChipFETThe results show that a major reduction can be made inθJAis 80C/W steady state, compared with 68C/W for thethe thermal resistance by increasing the copper drain area.SO–8.
