NTD3055L104T4G ,Power MOSFET 12 Amps, 60 Volts, Logic LevelELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)JCharacteristic Symbol Min Typ Max Unit ..
NTD3055L170 ,Power MOSFET 9.0 Amps, 60 Volts, Logic Level N-Channel DPAK3R , DRAIN−TO−SOURCE RESISTANCE R , DRAIN−TO−SOURCE RESISTANCE () I , DRAIN CURRENT (AMPS)DS(on) D ..
NTD3055L170G ,Power MOSFET 9.0 Amps, 60 Volts, Logic Level N-Channel DPAK2NTD3055L17020 16V = 10 VGS V ≥ 10 VDS165 V8 V126 V1284 V83.5 V44T = 25°CJ3 VT = −55°CT = 100°C JJ0 ..
NTD3055L170T4 ,Power MOSFET 9.0 Amps, 60 Volts, Logic Level N-Channel DPAKELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)JCharacteristic Symbol Min Typ Max Unit ..
NTD3055L170T4G ,Power MOSFET 9.0 Amps, 60 Volts, Logic Level N-Channel DPAKMAXIMUM RATINGS (T = 25°C unless otherwise noted)JMARKINGRating Symbol Value UnitDIAGRAMSDrain−to−S ..
NTD30N02 ,Power MOSFET 30 Amps, 24 VoltsELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)JCharacteristic Symbol Min Typ Max Unit ..
OR3T125-6PS208 , 3C and 3T Field-Programmable Gate Arrays
OR3T20-6BA256 , 3C and 3T Field-Programmable Gate Arrays
OR3T55-6BA256 , 3C and 3T Field-Programmable Gate Arrays
OR3T55-7BA256 , 3C and 3T Field-Programmable Gate Arrays
OR3T55-7PS208 , 3C and 3T Field-Programmable Gate Arrays
OR3T80-6PS240 , 3C and 3T Field-Programmable Gate Arrays
NTD3055L104-NTD3055L104-1G-NTD3055L104G-NTD3055L104T4-NTD3055L104T4G
Power MOSFET 12 Amps, 60 Volts, Logic Level
3R , DRAIN−TO−SOURCE RESISTANCE R , DRAIN−TO−SOURCE RESISTANCE () I , DRAIN CURRENT (AMPS)DS(on) DS(on) D(NORMALIZED)R , DRAIN−TO−SOURCE RESISTANCE ()I , LEAKAGE (nA)DS(on)DSSI , DRAIN CURRENT (AMPS)DNTD3055L104POWER MOSFET SWITCHINGSwitching behavior is most easily modeled and predicted The capacitance (C ) is read from the capacitance curve atissby recognizing that the power MOSFET is charge a voltage corresponding to the off−state condition whencontrolled. The lengths of various switching intervals (t) calculating t and is read at a voltage corresponding to thed(on)are determined by how fast the FET input capacitance can on−state when calculating t .d(off)be charged by current from the generator. At high switching speeds, parasitic circuit elementscomplicate the analysis. The inductance of the MOSFETThe published capacitance data is difficult to use forsource lead, inside the package and in the circuit wiringcalculating rise and fall because drain−gate capacitancewhich is common to both the drain and gate current paths,varies greatly with applied voltage. Accordingly, gateproduces a voltage at the source which reduces the gate drivecharge data is used. In most cases, a satisfactory estimate ofcurrent. The voltage is determined by Ldi/dt, but since di/dtaverage input current (I ) can be made from aG(AV)is a function of drain current, the mathematical solution isrudimentary analysis of the drive circuit so thatcomplex. The MOSFET output capacitance alsot = Q/IG(AV)complicates the mathematics. And finally, MOSFETs havefinite internal gate resistance which effectively adds to theDuring the rise and fall time interval when switching aresistance of the driving source, but the internal resistanceresistive load, V remains virtually constant at a levelGSis difficult to measure and, consequently, is not specified.known as the plateau voltage, V . Therefore, rise and fallSGPThe resistive switching time variation versus gatetimes may be approximated by the following:resistance (Figure 9) shows how typical switchingt = Q x R /(V − V )r 2 G GG GSPperformance is affected by the parasitic circuit elements. Ift = Q x R /Vf 2 G GSPthe parasitics were not present, the slope of the curves wouldmaintain a value of unity regardless of the switching speed.whereThe circuit used to obtain the data is constructed to minimizeV = the gate drive voltage, which varies from zero to VGG GGcommon inductance in the drain and gate circuit loops andR = the gate drive resistanceGis believed readily achievable with board mountedand Q and V are read from the gate charge curve.2 GSP components. Most power electronic loads are inductive; thedata in the figure is taken with a resistive load, whichDuring the turn−on and turn−off delay times, gate current isapproximates an optimally snubbed inductive load. Powernot constant. The simplest calculation uses appropriateMOSFETs may be safely operated into an inductive load;values from the capacitance curves in a standard equation forhowever, snubbing reduces switching losses.voltage change in an RC network. The equations are:t = R C In [V /(V − V )]d(on) G iss GG GG GSPt = R C In (V /V )d(off) G iss GG GSP1000V = 0 V V = 0 VDS GST = 25°CJC800iss600Crss400Ciss200CossCrss01055 0 10 15 20 25V VGS DSGATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)Figure 7. Capacitance Variation
