NTB18N06LT4 ,Power MOSFET 15 Amps, 60 Volts, Logic Level N-Channel, D2 PakELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)JCharacteristic Symbol Min Typ Max Unit ..
NTB18N06LT4G ,Power MOSFET 15 Amps, 60 Volts, Logic Level N-Channel, D2 Pak3R DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) R , DRAIN−TO−SOURCE RESISTANCE () I , DRAIN CURRENT (AM ..
NTB23N03RG ,Power MOSFET 23 Amps, 25 Volts N−Channel D2PAKELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)J Characteristics Symbol Min Typ Ma ..
NTB23N03RT4G ,Power MOSFET 23 Amps, 25 Volts N−Channel D2PAK2NTB23N03R20 204.5 V10 VV ≥ 10 VDS8 V4 V6 V16 165 V3.5 V12 1288T = 25°CJ3 V44T = −55°CT = 125°CJ JV ..
NTB25P06 ,Power MOSFET 25 A, 60 V P-Channel D2PAKMaximum ratings applied to the device are individual stress limit values (notnormal operating condi ..
NTB25P06 ,Power MOSFET 25 A, 60 V P-Channel D2PAKELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)CCharacteristic Symbol Min Typ Max Unit ..
OPA743UA ,12V, 7MHz, CMOS Rail-to-Rail I/O Operational Amplifier®OPA743OPA743OPA743OPA743OPA743OPA2743OPA4743SBOS201 – MAY 200112V, 7MHz, CMOS, Rail-to-Rail I/OOPE ..
OPA743UAG4 ,12V, 7MHz, CMOS Rail-to-Rail I/O Operational Amplifier 8-SOIC -40 to 85®OPA743OPA743OPA743OPA743OPA743OPA2743OPA4743SBOS201 – MAY 200112V, 7MHz, CMOS, Rail-to-Rail I/OOPE ..
OPA820 ,Unity Gain Stable,Low Noise,Voltage Feedback Operational AmplifierFeatures 3 DescriptionThe OPA820 device provides a wideband, unity-gain1• High Bandwidth (240 MHz, ..
OPA820ID ,Unity Gain Stable,Low Noise,Voltage Feedback Operational Amplifier7.2 ESD RatingsVALUE UNIT(1)Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 ±3000(2)V Electrosta ..
OPA820ID ,Unity Gain Stable,Low Noise,Voltage Feedback Operational AmplifierMaximum Ratings.. 313 Device and Documentation Support........ 377.2 ESD Ratings........ 413.1 Devi ..
OPA820ID ,Unity Gain Stable,Low Noise,Voltage Feedback Operational AmplifierMaximum Ratings(1)over operating free-air temperature range (unless otherwise noted)MIN MAX UNITPow ..
NTB18N06L-NTB18N06LT4-NTB18N06LT4G
Power MOSFET 15 Amps, 60 Volts, Logic Level N-Channel, D2 Pak
3R DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) R , DRAIN−TO−SOURCE RESISTANCE () I , DRAIN CURRENT (AMPS)DS(on), DS(on) DR , DRAIN−TO−SOURCE RESISTANCE ()DS(on)I , LEAKAGE (nA)DSSI , DRAIN CURRENT (AMPS)DNTP18N06L, NTB18N06LPOWER MOSFET SWITCHINGSwitching behavior is most easily modeled and predicted The capacitance (C ) is read from the capacitance curve atissby recognizing that the power MOSFET is charge a voltage corresponding to the off−state condition whencontrolled. The lengths of various switching intervals (t) calculating t and is read at a voltage corresponding to thed(on)are determined by how fast the FET input capacitance can on−state when calculating t .d(off)be charged by current from the generator. At high switching speeds, parasitic circuit elementscomplicate the analysis. The inductance of the MOSFETThe published capacitance data is difficult to use forsource lead, inside the package and in the circuit wiringcalculating rise and fall because drain−gate capacitancewhich is common to both the drain and gate current paths,varies greatly with applied voltage. Accordingly, gateproduces a voltage at the source which reduces the gate drivecharge data is used. In most cases, a satisfactory estimate ofcurrent. The voltage is determined by Ldi/dt, but since di/dtaverage input current (I ) can be made from aG(AV)is a function of drain current, the mathematical solution isrudimentary analysis of the drive circuit so thatcomplex. The MOSFET output capacitance alsot = Q/IG(AV)complicates the mathematics. And finally, MOSFETs havefinite internal gate resistance which effectively adds to theDuring the rise and fall time interval when switching aresistance of the driving source, but the internal resistanceresistive load, V remains virtually constant at a levelGSknown as the plateau voltage, V . Therefore, rise and fall is difficult to measure and, consequently, is not specified.SGPtimes may be approximated by the following: The resistive switching time variation versus gateresistance (Figure 9) shows how typical switchingt = Q x R /(V − V )r 2 G GG GSPperformance is affected by the parasitic circuit elements. Ift = Q x R /Vf 2 G GSPthe parasitics were not present, the slope of the curves wouldmaintain a value of unity regardless of the switching speed.whereThe circuit used to obtain the data is constructed to minimizeV = the gate drive voltage, which varies from zero to VGG GGcommon inductance in the drain and gate circuit loops andR = the gate drive resistanceGis believed readily achievable with board mountedand Q and V are read from the gate charge curve.2 GSP components. Most power electronic loads are inductive; thedata in the figure is taken with a resistive load, whichDuring the turn−on and turn−off delay times, gate current isapproximates an optimally snubbed inductive load. Powernot constant. The simplest calculation uses appropriateMOSFETs may be safely operated into an inductive load;values from the capacitance curves in a standard equation forhowever, snubbing reduces switching losses.voltage change in an RC network. The equations are:t = R C In [V /(V − V )]d(on) G iss GG GG GSPt = R C In (V /V )d(off) G iss GG GSP1200V = 0 V V = 0 VDS GST = 25°CJ1000Ciss800C600 rss400Ciss200CossCrss01055 0 10 15 20 25V VGS DSGATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)Figure 7. Capacitance Variation
