NMC27C256BQ-200 ,200 ns, Vcc=5V+/-10%, 262,144-bit (32k x 8) high speed version UV erasable CMOS PROMGeneral Description
The NMC27C256B is a high-speed 256k UV erasable and
electrically reprogramm ..
NMC27C256BQ-200 ,200 ns, Vcc=5V+/-10%, 262,144-bit (32k x 8) high speed version UV erasable CMOS PROMElectrical Characteristics
Symbol Parameter Condltlons Min Typ Max Unlts
ILI Input Load Current V ..
NMC27C256BQ-250 ,250 ns, Vcc=5V+/-10%, 262,144-bit (32k x 8) high speed version UV erasable CMOS PROMBlock Diagram
WWWM
Vac H
tttttto--'
Itre _
tie mm mm:
um - _.
tt mu: Louie
M-AM
AM ..
NMC27C256Q17 ,170 ns, Vcc=5V+/-5%, 262,144-bit (32k x 8) UV erasable CMOS PROMapplications where fast turnaround, pattern experiments l Low CMOS power consumption
9SZOLZOWN
..
NMC27C256Q-17 ,170 ns, Vcc=5V+/-5%, 262,144-bit (32k x 8) UV erasable CMOS PROMBlock Diagram _
am OUTPUTS lk-th
lltt; H
mm o--
1tre o---
0mm! EMILE
mo cm! Pin Nam ..
NMC27C256Q20 ,200 ns, Vcc=5V+/-5%, 262,144-bit (32k x 8) UV erasable CMOS PROMBlock Diagram _
am OUTPUTS lk-th
lltt; H
mm o--
1tre o---
0mm! EMILE
mo cm! Pin Nam ..
OES021ZC-A ,One - Ultra-Dense 40W converter
OM4068H ,LCD driver for low multiplex ratesGENERAL DESCRIPTION1⁄3The OM4068 is a low-power CMOS LCD driver, designed• 32 segment driversto dri ..
OM4068H/2 ,OM4068; LCD driver for low multiplex rates
OM4085T/F1 ,OM4085; Universal LCD driver for low multiplex rates
OM5193H ,Disk drive spindle and VCM with servo controller
OM5202FBB ,ROMless 8-bit microcontroller
NMC27C256BQ150-NMC27C256BQ-150-NMC27C256BQ20-NMC27C256BQ200-NMC27C256BQ-200-NMC27C256BQ-250
150 ns, Vcc=5V+/-5%, 262,144-bit (32k x 8) high speed version UV erasable CMOS PROM
NMC27C2563
gil National
Semiconductor
PRELIMINARY
NMC27C256B High Speed Version
262,144-Bit (32k x 8) UV Erasable CMOS PROM
General Description
The NMC27C256B is a high-speed 256k UV erasable and
electrically reprogrammabie CMOS EPROM, ideally suited
tor applications where fast turnaround, pattern experimenta-
tion and low power consumption are important require-
ments.
The NMC27C256B is designed to operate with a single
+5V power supply with d:5% or i10% tolerance. The
CMOS design allows the part to operate over extended and
military temperature ranges.
The NMC27C256B is packaged in a 28-pin dual-in-line
package with transparent lid. The transparent lid allows the
user to expose the chip to ultraviolet light to erase the bit
pattern. A new pattern can then be written electrically into
the device by following the programming procedure.
This EPROM is fabricated with National's proprietary, time
proven CMOS double-poly silicon gate technology which
combines high performance and high density with low pow-
er consumption and excellent reliability.
Features
Clocked sense amps for fast access time down to
150 ns
Low CMOS power consumption
- Active power: 110 mW max
- Standby power: 0.55 mW max
Optimal EPROM for totai CMOS systems
Extended temperature range (NMC27C256BQE),
-40'C to +85''C, and military temperature range
(NMC27C256BOM), -55'C to +125''C available
Pin compatible with NMOS 256k EPROMS
Fast and reliable programming-1 00 ps typicaI/byte
Static operation-no clocks required
TTL, CMOS compatible inputs/outputs
TRI-STATE0 output
Manufacturer's identification code for automatic pro-
gramming control
High current CMOS level output drivers
Block Diagram
omouwnth-m
1uo--.
tmoo-e
'pro--.
INPUT!
m.tu-m
CELL nnm
Pln Names
AO-AI 4 Addresses
C-E Chip Enable
ttti Output Enable
Oo-th Outputs
m Program
NC No Connect
TL/D/9125-1
Connection Diagram
27cs12 27C128 27cs4 27C32 27C16 NMC27C256BQ
27512 27128 2784 2732 2716 Dual-in-Une Package
A15 Vpp Vpp " 1 " - v9;
A12 A12 A12 " - t " - "
A7 A7 A7 A7 A7 M - , " - "
A6 A6 A6 A6 A6 " - ' n - "
A5 A5 A5 A5 A5 " - 5 u - "
A4 A4 A4 A4 A4 u a s " - an
A3 A3 A3 M A3 " .2 , n - M
A2 A2 A2 A2 A2 " - ' It - "
A1 A1 A1 A1 A1 " - ' n - tt
A0 A0 A0 A0 A0 M _. 10 tt - o,
00 00 00 th, 00 - M II -o,
01 o, o, th o, th- tt "--h
th 02 02 02 02 h - " II - h
GND GND GND GND GND "Ir- u 15 -5,
TL/D/9125-2
27018 27032 27084 270128 27C512
2716 2732 2764 27128 27512
Voc Vcc Voc
W W A14
Vcc Vcc NC A1 3 A1 3
A8 A8 M A8 A8
A9 A9 A9 A9 A9
Vpp A1 1 A11 A1 1 A1 1
GE 'oTa/vpp Ut? UE b'E/vpp
A1 0 A1 0 A1 0 A1 0 A1 0
CE/PGM if tTE" the UE
O7 Or 07 o, o,
03 th 05 Os Os
Os Os Os Os Os
O4 O4 O4 04 O4
03 Oa 03 03 03
Note: Socket compatible EPROM pin configurations are shown in me blocks adiacent to the NMC27C256B pins.
Order Number NMC27C256BQ
See NS Package Number J28At2
Commercial Temp Range (0'C to + TtPC)
vcc = SV t 5%
Parameter/Order Number Access Tlme (ns)
NMC27C256Bt215 150
NMC27C256Bt220 200
NMC27C256BO25 250
Extended Temp Range (-4tt'C to + 85''C)
Vcc = 5V i 10%
Commercial Temp Range (0°C to + 70°C)
Vcc = 5V t10%
Parameter/Order Number
Access Time (ns)
NMC27C256BQ150 150 - .
NMC27C256BQ200 200
NMC27C256BC250 250
Mllltary Temp Range c- 55'C to + 125°C)
Vcc = 5V $1096
Parameter/Order Number Access Time (ns) Parameter/Order Number Access Time (ns)
NMC27C256BQE150 150 NMC27C256BQM150 150
NMC27C256BQE200 200 NMC27C256BQM200 200
NOTE: For plastic DIP and surface mount PLCC package requirements please refer to NMC27C256BN data sheet.
GQSZOLZOWN
NMC27C2568
COMMERCIAL TEMPERATURE RANGE
Absolute Maximum Ratings (Note1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Offltte/Dlatrlhutors for availability and speclflcatlons.
Temperature Under Bias -10''C to + 80"C
Storage Temperature --65"C to + 150°C
Vcc Supply Voltages with
Respect to Ground + 7.0V to -0.6V
All Input Voltages except A9 with
Respect to Ground (Note 10) + 6.5V to -0.6V
All Output Voltages with
Vpp Supply Voltage and A9
with Respect to Ground + 14.0V to -0.6V
Power Dissipation 1.0W
Lead Temperature (Soldering, 10 sec.) 300°C
ESD Rating
(Mil Spec 883C, Method 3015.2) 2000V
Operating Conditions (Note 6)
Temperature Range
Vcc Power Supply
0°C to + 70°C
Respect to Ground (Note 10) Vcc+ 1.0V to GND-0.6V NMC 27C256BO15, 20, 25 + 5V t 5%
NMC 27C256BtM50, 200, 250 + 5V 210%
READ OPERATION
DC Electrical Characteristics
Symbol Parameter Conditions Min Typ Max Units
ILI Input Load Current VIN = Vcc or GND 1.0 p.A
'Lo Output Leakage Current VOUT = Vcc or GND, tTit = VIH 1.0 ”A
Iccl VCC Current (Active) E = Vot = 5 MHz l 5 30 m A
(Note 9) TTL Inputs All Inputs = VIH or VIL, I/O = 0 mA
Iccg VCC Current (Active) O_E = GND, f = 5 MHz 10 20 m A
(Note 9) CMOS Inputs Ali Inputs == Vcc or GND, I/O = 0 mA
|CCSB1 Vcc Current (Standby) E = VIH 0.1 " m A
TTL Inputs
'CCSBZ tiCot2','lttststandby) CE Vcc 0.5 1 00 p. A
Ipp Vpp Load Current Vpp = V00 10 p.A
VIL Input Low Voltage - 0.2 0.8 V
ViH Input High Voltage 2.0 Vcc + 1 V
V0L1 Output Low Voltage IOL = 2.1 mA 0.40 V
VOH1 Output High Voltage IOH = -2.5 mA 3.5 V
VOL2 Output Low Voltage IOL = 10 0A 0.1 V
V0H2 Output High Voltage lou = -10 MA Vcc - 0.1 V
AC Electrical Characteristics
NMC27C256B
Symbol Parameter Condltlons 015, 0150 020. 0200 025, 0250 Units
Min Max Min Max Min Max
tACC Address to Output Delay C-E = o-E = " 150 200 250 ns
tCE C: to Output Delay t5t? = " 150 200 250 ns
tog W to Output Delay ' = " 60 75 100 ns
tDF E High to Output Float C-E = " 50 55 BO ns
tcp E High to Output Float CE = " 0 50 55 0 60 ns
tOH 1utpuydold from Addresses, E = ttiii = "
CE or OE, Whichever 0 0 0 ns
Occurred First
MILITARY AND EXTENDED TEMPERATURE RANGE
Absolute Maximum Ratings (Note1)
If MllltarylAerospace speclfled devices are required,
please contact the National Semiconductor Sales
Ofmte/DlMrlbutora for twailablllty and ttpetMttatlona.
Vpp Supply Voltage and A9
with Respect to Ground
+14.0Vto -0.6V
Power Dissipation 1.0W
Temperature Under Bias Operating Temp. Range Lead Temperature (Soldering, 10 sec.) 300°C
Storage Temperature -65''C to + 150''C ESD Rating
Vcc Supply Voltages with (Mil Spec 883C, Method 3015.2) 2000V
Respect to Ground f 7.0V to -0.61/
All Input Voltages except A9 with Operating Conditions (Note 6)
Respect to Ground (Note 10) + 6.5V to -0.6V Vcc Power Supply 5V i 10%
All Output Voltages with
Respect to Ground (Note 10)
vcc+ 1.0V to GND-0.6V
Temperature Range
NMC27C256BOE150, 200
NMC27C256BQM150, 200
-40"C to + 85°C
- 55°C to + 125°C
GQSZOLZOWN
READ OPERATION
DC Electrical Characteristics
Symbol Parameter Conditions Mln Typ Max Units
ILI Input Load Current VIN = Vcc or GND 10 p.A
ILO Output Leakage Current VOUT = Vcc or GND, E = " 10 WA
Icty VCC Current (Active) C-E = VIL,f = 5 MHz 15 30 m A
(Note 9) TTL Inputs All Inputs = Ihr, or VIL, l/O = 0 mA
Iccz Vcc Current(Active) E = GND,t = 5 MHz 10 20 m A
(Note 9) CMOS Inputs All Inputs = Vcc or GND, IIO = 0 mA
|CCSB1 VCC Current (Standby) tTE = " 0.1 1 .. . m A
TTL Inputs
Iccstsa ticgiuc,tlts(Standby) CE Vcc OS 100 P- A
Ipp Vpp Load Current Vpp = Vcc IO pA
" Input Low Voltage - 0.2 0.8 V
VIH Input High Voltage 2.0 Vcc + 1 V
VOL1 Output Low Voltage lor. = 2.1 mA 0.40 V
Vom Output High Voltage IOH = - 1.6 mA 3.5 V
V0L2 Output Low Voltage IOL = 10 p.A 0.1 V
Vore Output High Voltage IOH = -10 pLA Voc - 0.1 V
AC Electrical Characteristics
NMC27C256B
Symbol Parameter Conditions 3511552; S'gl; Units
Mln Max Min Max
tACC Address to Output Delay E = E = " 150 200 ns
tog tTito Output Delay CT? = " 150 200 ns
tog Ul? to Output Delay tTE = " 60 75 ns
tDF E High to Output Float UE = " 50 o 55 ns
tcp E High to Output Float Uri? = " 0 50 0 55 ns
tOH 9ytpltltrld from Addresses, E = ‘O_E = "
CE or OE, Whichever 0 0 ns
Occurred First
NMC27C2563
Capacitance TA = +25°C, f = 1 MHz (Note 2)
Symbol Parameter Conditions Typ Max Units
GIN Input Capacitance VIN = 0V 6 12 pF
COUT OutputCapacitance VOUT = 0V 9 12 pF
AC Test Conditions
Output Load 1 TTL Gate and Timing Measurement Reference Level
CL = 100 pF (Note 6) Inputs 0.8V and 2V
Input Rise and Fall Times s5 ns Outputs 0.8V and 2V
Input Pulse Levels 0.45V to 2.4V
AC Waveforms (Notes 6, 7 a 9)
2.0V F J ,
ADDRESSES " ADDRESSES VALID y
0.8V L r f
- 2.0V N t -
CE 0.8V n /
‘ca - kr -
(NOTES 4,5)
- 2.0V
or 0.8V n /
t J J t
05 . _ tIF -
(NOTE 3) r r (NOTES 4, ti)
2.0V Hl-Z J J , m-z
OUTPUT '0.tyv" VALID OUTPUT f f ')))))Hu-
tAcc __ tow --- f .
(NOTE 3)
TLft3/iM25-3
Note 1: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reiiabiiity.
Note 2: This parameter is only sampled and is not 100% tested.
Note & E may be delayed up to tACC - toe after the falling edge ottX without impacting tacc.
Note 4: The top and to; compare level is determined as follows:
High to TRI-STATE, the measured VOH1 (DC) - 0.10V;
Low to TRI-STATE, the measured V0L1 (DC) + (h10V.
Note 5: TRl-STATE may be attained using O_E or '
Note 6: The power switching characteristics of EPROMs require careful device decoupling. It is recommended that at least a 0.1 HF ceramic capacitor be used on
every device between Vcc and GND.
Note r.. The outputs must be restricted to Vcc + 1.0V to avoid latch-up and device damage.
Note 8: 1 TTL Gate: IOL = 1.6 mA, Kors = -400 "
CL: 100 pF includes fixture capacitance.
Note 9: Vpp may be connected to Voc except during programming.
Note 10: Inputs and outputs can undershoot to -2.0V for 20 ns Max.
Programming Characteristics (Notes 1, 2, a & 4)
Symbol Parameter Conditions Min Typ Max Units
Us Address Setup Time 1 Wit
hes a Setup Time 1 ps
tDs Data Setup Time 1 ps
typs Vpp Setup Time 1 p.s
tvcs Vcc Setup Time 1 p8
tAH Address Hold Time 0 us
to” Data Hold Time 1 ps
tDF Output Enable to Output Float Delay 0 60 ns
tpw Program Pulse Width 95 100 105 p.s
105 Data Valid from UE UE = W. 100 ns
lpp Vpp Supply Current During tX = VlL 30 m A
Programming Pulse E = VIH
ICC Vcc Supply Current 10 mA
TA Temperature Ambient 20 25 30 (
Vcc Power Supply Voltage 6.0 6.25 6.5 V
Vpp Programming Supply Voltage 12.5 12.75 13.0 V
tFR Input Rise, Fall Time 5 ns
" Input Low Voltage 0.0 0.45 V
Vm Input High Voltage 2.4 4.0 V
W Input Timing Reference Voltage 0.8 1.5 2.0 V
tOUT Output Timing Reference Voltage 0.8 1.5 2.0 V
Programming Waveforms
ADDRESSES
DATA DATA ll STABLE
Ft 03v
TL/D/9125-5
Not. t.. NMionars standard product warranty applies only to devices programmed to specifications described herein.
N01. 2: Vcc must be applied simultaneously or before Vpp and removed simultaneously or after Vpp. The EPROM must not be inserted into or removed from a
board with voltage applied to Vpp or Voc-
Not' & The maximum absolute anowable voltage which may be applied to the Vpp pin during programming is 14V. Care must be taken when switching the Vpp
supply to prevent any overshoot from exceeding this 14V maximum specification. At least a 0.1 HF capacitor is required across Vpp. Vcc to GND to suppress
spurious voltage transients which may damage the device.
Note 4: Programming and program verify are tested with the fast Program Algorithm, at typical power supply voltages and timings.
GQSZOLZOWN
NMC27C2568
Fast Programming Algorithm Flow Chart (Note 4)
MN = FIRST LOCATION
Voc = 6.25V
bi, = 12.75V
INCREMENT ADDR
---'C PROGRAM ONE 100 p3 PULSE)
INCREMENT X
LAST ADDR ?
Vcc = VPP = 5.011
VERIFY
ALL BYTES
DEVICE PASSED
FIGURE 1
DEVICE ._
FAILEU
DEVICE
FAILED
TL/D/9125-7
Interactive Programming Flow Chart (Note 4)
ADDR = FIRST LOCATION
l X = 0 )
--ri PROGRAM ONE 0.5 ms PULSE )
INCREMENT X
DEVICE
FAILED
INCREMENT ADDR
var-. va= 5.0V * 5 x
DEVICE
FAILED
DEVICE PASSED
FIGURE 2
TL/D/9125-6
GQSZOLZOWN
NMC27C2568
Functional Description
DEVICE OPERATION
The six modes of operation of the NMC27C256B are listed
in Table I. It should be noted that all inputs for the six modes
are at TTL levels. The power supplies required are VCC and
Vpp. The Vpp power supply must be at 12.75V during the
three programming modes, and must be at 5V in the other
three modes. The VCC power supply must be at 6.25V dur-
ing the three programming modes, and at 5V in the other
three modes.
Read Mode
The NMC27C256B has two control functions, both of which
must be logically active in order to obtain data at the out-
puts. Chip Enable (CE) is the power control and should be
used for device selection. Output Enable (E) is the output
control and should be used to gate data to the output pins,
independent of device selection. Assuming that addresses
are stable, address access time (1Acc) is equal to the delay
from E to output (log). Data is available at the outputs tog
after the falling edge of i, assuming that C-E has been low
and addresses have been stable for at least tACC - toe.
The sense amps are clocked for fast access time. Vcc
should therefore be maintained at operating voltage during
read and verify. If VCC temporarily drops below the spec.
voltage (but not to ground) an address transition must be
performed after the drop to insure proper output data.
Standby Mode
The NMC27C256B has a standby mode which reduces the
active power dissipation by over 99%, from 110 mW to
0.55 mW. The NMC27C256B is placed in the standby mode
by applying a CMOS high signal to the CTE" input. When in
standby mode, the outputs are in a high impedance state,
independent of the t5E input.
Output OR-Tying
Because NMC27C256Bs are usually used in larger memory
arrays, National has provided a 2-line control function that
accommodates this use of multiple memory connections.
The 2-line control function allows for:
a) the lowest possible memory power dissipation, and
to) complete assurance that output bus contention will not
occur,
To most efficiently use these two control lines, it is recom-
mended that Ut? (pin 20) be decoded and used as the pri-
mary device selecting function, while tTE (pin 22) be made a
common connection to all devices in the array and connect-
ed to the READ line from the system control bus. This as-
sures that all deselected memory devices are in their low
power standby modes and that the output pins are active
only when data is desired from a particular memory device.
Programming
CAUTION: Exceeding 14V on pin 1 (Vpp) will damage the
NMC27C256B.
Initially, and after each erasure, all bits of the NMC27C256B
are in the "l" state. Data is introduced by selectively pro-
gramming "Os" into the desired bit locations. Although only
"Os" will be programmed, both "Is" and "Os" can be pres-
ent in the data word. The only way to change a "O'' to a "I ''
is by ultraviolet light erasure.
The NMC27C256B is in the programming mode when the
Vpp power supply is at 12.75V and GE is at V.H. It is re-
quired that at least a 0.1 pF capacitor be placed across
Vpp. Vcc to ground to suppress spurious voltage transients
which may damage the device. The data to be programmed
is applied 8 bits in parallel to the data output pins. The levels
required for the address and data inputs are TTL.
When the address and data are stable, an active low, TTL
program pulse is applied to the CE input. A program pulse
must be applied at each address location to be pro-
grammed. The NMC27C256B is programmed with the Fast
Programming Algorithm shown in Figure I. Each Address is
programmed with a series of 100 ps pulses until it verifies
good, up to a maximum of 25 pulses. Most memory cells will
program with a single 100 HS pulse. The NMC27C256B
must not be programmed with a DC signal applied to the E
input.
Note: Some programmer manufactures due to equipment limitation may of.
fer interactive program Algorithm (shown in Figure 2).
TABLE l. Mode Selection
Pins tTE o-E Vp Vcc Outputs
Mode (20) (22) (1) (28) (11-13, 15-19)
Read " " 5V 5V DOUT
Standby Ihr., Don't Care SV SV Hi-Z
Output Disable Don't Care VIH SV SV Hi-Z
Program " VIH 12.75V 6.25V DIN
Program Verify VIH " 12.75V 6.25V DOUT
Program Inhibit VIH " 12.75V 6.25V Hi-Z
Functional Description (Continued)
Programming multiple NMC27C256Bs in parallel with the
same data can be easily accomplished due to the simplicity
of the programming requirements. Like inputs of the paral-
Ieled NMC27C256B may be connected together when they
are programmed with the same data. A low level TTL pulse
applied to the tTE input programs the paralleled
NMC27C256B.
Program Inhibit
Programming multiple NMC27C256Bs in parallel with differ-
ent data is also easily accomplished. Except Crt, all like
inputs (including tre) of the parallel NMG27C256Bs may be
common. A TTL low level program pulse applied to an
NMC27C256B E input with Vpp at 12.75V will program that
NMC27C256B. A TTL high level tM input inhibits the other
NMC27C256Bs from being programmed.
Program Verlty
A verify should be performed on the programmed bits to
determine whether they were correctly programmed. The
verify may be performed with Vpp at 12.75V. Vpp must be at
Vcc except during programming and program verify.
Manufacturer's Identification Code
The NMC27C256B has a manufacturer's identification code
to aid in programming. When the device is inserted in an
EPROM programmer socket, the programmer reads the
code and then automatically calls up the specific program-
ming algorithm for the part. This automatic programming
control is only possible with programmers which have the
capability of reading the code.
The Manufacturer's Identification code, shown in Table II,
specifically identifies the manufacturer and the device type.
The code for NMC27C256B is "8F04", where "8F" desig-
nates that it is made by National Semiconductor, and ''04"
designates a 256k part.
The code is accessed by applying 12.0V d:0.5V to address
pin A9. Addresses AI-AB, A10-A14, and all control pins
are held at VIL. Address pin A0 is held at " for the manu-
facturer's code, and held at V.H for the device code. The
code is read on the eight data pins, 00-07. Proper code
access is only guaranteed at 25''C :5°C.
ERASURE CHARACTERISTICS
The erasure characteristics of the NMC27C256B are such
that erasure begins to occm when exposed to light with
wavelengths shorter than approximately 4000 Angstroms
th). It should be noted that sunlight and certain types of
fluorescent lamps have wavelengths in the 3000A-4000A
range. After programming, opaque labels should be placed
over the NMC27C256B window to prevent unintentional
erasure. Covering the window will also prevent temporary
functional failure due to the generation of photo currents.
The recommended erasure procedure for the
NMC27C256B is exposure to short wave ultraviolet light
which has a wavelength of 2537 Angstroms (A). The inte-
grated dose (i.e., UV intensity M exposure time) for erasure
should be a minimum of 15W-sec/cm2.
The NMC27C256B should be placed within 1 inch of the
lamp tubes during erasure. Some lamps have a filter on their
tubes which should be removed before erasure. Table III
shows the minimum NMC27C256B erasure time for various
light intensities.
An erasure system should be calibrated periodically. The
distance from lamp to unit should be maintained at one inch.
The erasure time increases as the square of the distance. (It
distance is doubled the erasure time increases by a factor of
4.) Lamps lose intensity as they age. When a lamp is
changed, the distance has changed, or the lamp has aged,
the system should be checked to make certain full erasure
is occurring. Incomplete erasure will cause symptoms that
can be misleading. Programmers, components, and even
system designs have been tsrroneously suspected when in-
complete-erasure was the problem.
SYSTEM CONSIDERATION
The power switching characteristics of EPROMs require
careful decoupling of the devices. The supply current;- ICC,
has three segments that are of interest to the system de-
signer-the standby current level. the active current level,
and the transient current peaks that are produced by volt-
age transitions on input pins. The magnitude of these tran-
sient current peaks is dependent on the output capacitance
loading of the device. The associated Vcc transient voltage
peaks can be suppressed by properly selected decoupling
capacitors. It is recommended that at least a 0.1 " ceramic
capacitor be used on every device between Vcc and GND.
This should be a high frequency capacitor of low inherent
inductance. In addition, at least a 4.7 p.F bulk electrolytic
capacitor should be used between VOC and GND for each
eight devices. The bulk capacitor should be located near
where the power supply is connected to the array. The pur-
pose of the bulk capacitor is to overcome the voltage drop
caused by the inductive effects of the PC board traces.
TABLE It. Manufaeturer'a tdentlflcatlon Code
Plns A0 Or Os os 04 03 02 o, 00 Hex
(10) (19) (18) (17) (16) (15) (13) (12) (11) Data
Manufacturer Code " 1 0 0 0 1 1 1 1 BF
Device Code VIH 0 0 0 0 0 1 0 0 04
TABLE Ill. Minimum NMC27C256B Erasure Time
Light Intensity
(Mlcro-Watts/cm2)
Erasure Time
(Minutes)
15,000
10,000
SQSZOLZOWN
This datasheet has been :
www.ic-phoenix.com
Datasheets for electronic components.
National Semiconductor was acquired by Texas Instruments.
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NMC27C256BQ15 - product/nm0270256bq15?HQS=Tl-nulI-nulI-dscatalog-df—pf—nuII-wwe
NMC27C256BQ25 - product/nmc270256bq25?HQS=T|—nuII-nulI-dscatalog-df—pf—nuII-wwe
NMC27C256BQ200 - product/nmc27c256bq200?HQS=TI—nu|I—nu|I-dscatalog-df-pf-nulI-wwe
NMC27C256BQ150 - product/nm027c256bq150?HQS=T|-nu|I-nu|I-dscatalog-df-pf-nulI-wwe
NMC27C256BQM200 - product/nmc27c256bqm200?HQS=T|-nulI-null-dscatalog-df—pf—nuII-wwe
NMC27C256BQM150 - product/nmc27c256qu150?HQS=TI-nulI-null-dscatalog-df—pf—nuII-wwe
NMC27C256BQE200 - product/nmc27c256bqe200?HQS=T|—nulI-nuIl-dscataIog-df-pf-null-wwe
NMC27C256BQE150 - product/nm027c256bqe150?HQS=TI-nulI-nuIl-dscataIog-df-pf-null-wwe
NMC27C256BQ250 - product/nm0270256bq250?HQS=TI-nuIl-nu|I-dscatalog-df-pf-nulI-wwe
