NMC27C128BQE200 ,200 ns, Vcc=5V+/-10%, 131,072-bit (16k x 8) high speed version UV erasable CMOS PROMNMCZ7C128B
National
Semiconductor
PRELIMINARY
NMC27C128B High Speed Version
131,072-Bit ..
NMC27C128BQM-150 ,150 ns, Vcc=5V+/-10%, 131,072-bit (16k x 8) high speed version UV erasable CMOS PROMElectrical Characteristics
Symbol Parameter Conditions Min Typ Max Unlts
IL; Input Load Current V ..
NMC27C128BQM200 ,200 ns, Vcc=5V+/-10%, 131,072-bit (16k x 8) high speed version UV erasable CMOS PROMNMCZ7C128B
National
Semiconductor
PRELIMINARY
NMC27C128B High Speed Version
131,072-Bit ..
NMC27C16BQ ,16,384-Bit (2048 x 8) CMOS EPROMBlock Diagram
VCC o--
GND o--
VPP o--
E Output Enable,
E/PGM Chip Enable, and
Program Log ..
NMC27C16BQ150 ,16,384-Bit (2048 x 8) CMOS EPROMFeatures
I Low CMOS power consumption
Active power: 55 mW max
Standby power: 0.55 mW max
I ..
NMC27C16BQ-150 ,16,384-Bit (2048 x 8) CMOS EPROMElectrical Characteristics
Symbol Parameter Conditions Min Typ Max Units
(Note 11)
ILI Input Loa ..
OES021ZC-A ,One - Ultra-Dense 40W converter
OM4068H ,LCD driver for low multiplex ratesGENERAL DESCRIPTION1⁄3The OM4068 is a low-power CMOS LCD driver, designed• 32 segment driversto dri ..
OM4068H/2 ,OM4068; LCD driver for low multiplex rates
OM4085T/F1 ,OM4085; Universal LCD driver for low multiplex rates
OM5193H ,Disk drive spindle and VCM with servo controller
OM5202FBB ,ROMless 8-bit microcontroller
NMC27C128BQ150-NMC27C128BQ-150-NMC27C128BQ200-NMC27C128BQ-200-NMC27C128BQ250-NMC27C128BQE150-NMC27C128BQE200-NMC27C128BQM-150-NMC27C128BQM200
150 ns, Vcc=5V+/-5%, 131,072-bit (16k x 8) high speed version UV erasable CMOS PROM
NMC27C1283
National
Semiconductor
PRELIMINARY
NMC27C128B High Speed Version
131,072-Bit (16k It 8) UV Erasable CMOS PROM
General Description
The NMC27C128B is a high-speed 128k UV erasable and
electrically reprogrammable CMOS EPROM, ideally suited
for applications where fast turnaround, pattern experimenta-
tion and low power consumption are important require-
ments.
The NMC27C128B is designed to operate with a single
+5V power supply with i5% or i10% tolerance. The
CMOS design allows the part to operate over extended and
military temperature ranges.
The NMC27C128B is packaged in a 28-pin dual-in-line
package with transparent lid. The transparent lid allows the
user to expose the chip to ultraviolet light to erase the bit
pattern. A new pattern can then be written electrically into
the device by following the programming procedure.
This EPROM is fabricated with National's proprietary, time
proven CMOS double-poly silicon gate technology which
combines high performance and high density with low pow-
er consumption and excellent reliability.
Features
I: Clock sense amps for fast access time down to 150 ns
" Low CMOS power consumption
- Active Power: 110 mW max
- Standby Power: 0.55 mW max
I: Extended temperature range (NMC27C128BQE),
-40''C to +85°C, and military temperature range
(NMC27C128BOM), -55''C to +125°C available
Pin compatible with NMOS 128k EPROMs
Fast and reliable programming-loo ps typical/byte
Static operation-no clocks required
TTL, CMOS compatible inputs/outputs
TRl-STATEo output
a Optimum EPROM for total CMOS systems
a Manufacturer's identification code for automatic pro-
gramming control
I: High current CMOS level output drivers
Block Diagram
NMC27Ct28B
om OUTPUTS th-th
Yet; o-- e-----"---
tmo +--+
OUTPUT ENABLE
AND CHIP
ENABLE LOGIC
smile.
DECODER
Air-ht 3
ADDRESS
INPUTS
DECODER
OUTPUT
BUFFERS
, (SAYING
65.5383"
CELL MATRIX
Pin Names
A0-A13 Addresses
CE Chip Enable
UE Output Enable
Oo-th Outputs
P-GM Program
NC No Connect
TL/D/9689-1
Connection Diagrams
NMC27C1283
DuaMn.LIne Package
270512 27C256 27C64 27C32 27C16
27512 27256 2764 2732 2716
A15 Vpp Vpp VPP-l I
A12 A12 A12 Au- 2
A7 A7 A7 A7 A7 A7- 3
A6 A6 A6 A6 A6 Ati- 4
A5 A5 A5 A5 A5 A5- 5
A4 A4 A4 A4 A4 M- 6
A3 A3 A3 A3 A3 M-- 7
A2 A2 A2 A2 A2 M-- 8
A1 A1 A1 A1 A1 A“ 9
A0 A0 A0 A0 A0 Ao- IO
00 00 00 00 00 oo-'" ll
01 01 o, th 01 th-' 12
O2 02 02 02 02 02- 15
GND GND GND GND GND tmo- 14
--irthh
I--A13
27C16 27C32 27C64 270256 27C512
2716 2732 2764 27256 27512
Vcc Vcc Vcc
'PrTM A14 A14
Vcc Vcc NC A1 3 A1 3
A8 A8 A8 A8 A8
A9 A9 A9 A9 A9
Vpp A1 1 A1 1 A1 1 A1 1
E GE/vpp trE tRt Utr/i/rv,
A1 0 A1 0 A10 A1 0 A1 0
'c-E/pt-W- CE tX Tlm CE
Or O7 O7 O7 O7
06 Os Os Os 05
Os Os Os Os Os
O4 O4 O4 O4 O4
Os 03 Os th 03
TL/D/9589-2
Note: Socket compatible EPROM pin configurations are shown in the blocks adjacent to the NM027C1288 pins.
Order Number NMC27C128BQ
See NS Package Number J28AQ
Commercial Temp Range (0°C to + 70°C)
Vcc = 5V d: 10%
Commercial Temp Range (0°C to + 7tt'C)
Vcc = 5V 15%
Parameter/Order Number
Access Tlme (ns)
Parameter/Order Number
Access Time (ns)
NMC27C128BQ150 150 NMC27C128BO15 150
NMC27C128BQ200 200 NMC27C128BO20 200
NMC27C128BO250 250 NMC27C128Bt225 250
Extended Temp Range (- 40''C to + 65°C)
Vcc = 5V i 10%
Military Temp Range c- 55''C to + 125°C)
Vcc = 5V i 10%
EBZIOLZOWN
Parameter/Order Number Access Time (ns) Parameter/Order Number Access Time (ns)
NMC27C128BQE150 150 NMC27C128BtUM150 150
NMC27C128BQE200 200 NMC27C128BQM200 200
NOTE: For plastic MP and surface mount PLCC package requirements please refer to NMC27C128BN datasheet.
NMC27C1288
COMMERCIAL TEMPERATURE RANGE
Absolute Maximum Ratings (Note1)
Temperature Under Bias - 10°C to + 80°C
Storage Temperature -65''C to + 150°C
All Input Voltages except A9 with
Respect to Ground (Note 10)
All Output Voltages with
Respect to Ground (Note 10)
Vpp Supply Voltage and A9
with Respect to Ground
+ 6.5V to -0.6V
Vcc+ 1.0V to GND-0.6V
Power Dissipation 1.0W
Lead Temperature (Soldering, 10 sec.) 30tt'C
ESD Rating
(Mil Spec 883C, Method 3015.2) 2000V
Operating Conditions (Note 7)
Temperature Range
Vcc Power Supply
0°C to + 70''C
During Programming + 14.OV to -0.6V NMC27C128BO150, 200, 250 +5v t10%
Vcc Supply Voltage with NMC27C128BO15, 20, 25 iSV t5%
Respect to Ground + 7.0V to --0.6V
READ OPERATION
DC Electrical Characteristics
Symbol Parameter Conditions Min Typ Max Unlts
IL; Input Load Current VIN = VCC or GND 0.01 1 FA
ILO Output Leakage Current VOUT = Vcc or GND, E = VIH 0.01 1 “A
Iccl Vcc Current (Active) CE = VIL,f = 5 MHz 10 30 mA
(Note 9) TTL Inputs Inputs = VIH or Vit., 1/0 = 0 mA
lccz Vcc Current (Active) E = GND,f = 5 MHz 8 20 m A
(Note 9) CMOS Inputs Inputs = VCC or GND, l/O = 0 mA
[00331 Vcc Current (Standby) E = VIH 0.1 1 mA
TTL Inputs
ICCSBZ "ticJi1rrrg,tts(standby) CE Vcc 0.5 100 “A
Ipp Vpp Load Current Vpp = Vcc 10 p.A
" Input Low Voltage -0.2 0.8 V
VH4 Input High Voltage 2.0 VCC + 1 V
VOL1 Output Low Voltage IOL = 2.1 mA 0.40 V
VOH1 Output High Voltage IOH = --2.5 mA 3.5 V
V0L2 Output Low Voltage IOL = 10 #A 0.1 V
VOH2 Output High Voltage IOH = --10 0A Vcc - 0.1 V
AC Electrical Characteristics
NMC27C128B
Symbol Parameter Conditions Q15, 0150 020, 0200 025, 0250 Unlts
Min Max Min Max Mln Max
tAcc Address to Output Delay SEE: E = " 150 200 250 ns
PGM = "
tCE E10 Output Delay E = V.L, p-tTM = VIH 150 200 250 ns
tog Eto Output Delay E = V.L, FtTM = VIH 60 75 100 ns
top Ul? High to Output Float E = VIL, PWM = vm 50 o 55 o 60 ns
kr E High to Output Float E = VIL, pt-aM- = Vw., 50 0 55 0 60 ns
tOH gtpumold from Addresses, CE: E = "
CE or OE, Whichever PGM = VIH 0 0 0 ns
Occurred First
MILITARY AND EXTENDED TEMPERATURE RANGE
Absolute Maximum Ratings (Note1)
If Mllltary/Aerospace specified devices are requlred,
please contact the National 8etttlttondutttor Sales
Offltte/DIBttlttutors for avallablllty and speclflcatlons.
Temperature Under Bias Operating Temp. Range
Storage Temperature - 65''C to + 150°C
All Input Voltages except A9 with
Respect to Ground (Note 10)
All Output Voltages with
Respect to Ground (Note 10)
Vpp Supply Voltage and A9
with Respect to Ground
+ 6.5V to - 0.6V
Vcc + 1.0V to GND - 0.6V
Vcc Supply Voltage with
Respect to Ground + 7.0V to - 0.6V
Power Dissipation 1 .0W
Lead Temperature (Soldering, 10 sec.) 300°C
ESD Rating
(Mil Spec 8830, Method 3015.2) 2000V
Operating Conditions (Note 7)
Temperature Range
NMC27C128BQE150, 200
NMC27C128BQM150, 200
-40"C to + 85°C
-55''C to + 125°C
EBZLOLZOWN
During Programming + 14.0V to -0.6V VCC Power Supply + 5V : 10%
READ OPERATION
DC Electrical Characteristics
Symbol Parameter Conditions Min Typ Max Units
IL. Input Load Current " = Vcc or GND 10 w/k
ILO Output Leakage Current VOUT = Vcc or GND, CE = VIH 10 pA
Icc, Vcc Current (Active) CE == 1hsf = 5 MHz 10 30 m A
(Note 9) TTL Inputs Inputs = VIH or VIL, vo = 0 mA
Iccz Vcc Current (Active) CE = GND,f = 5 MHz 8 20 m A
(Note 9) CMOS Inputs Inputs = VCC ort3ND, I/O = 0 mA
lccsa1 VCC Current (Standby) CE = Ihr, 0.1 1 f _ m A
TTL Inputs
lccsaz 2cJiug,rltts(standt'') CE Vcc 0.5 100 p A
Ipp Vpp Load Current Vpp = V00 10 p.A
" Input Low Voltage -0.2 0.8 V
ViH Input High Voltage 2.0 Vcc + 1 V
a, Output Low Voltage IOL = 2.1 mA 0.40 V
VOH1 Output High Voltage lor, = - 1.6 mA 3.5 V
Voce Output Low Voltage lor. = 10 pA 0.1 V
VOHZ Output High Voltage los, = -10 [LA Vcc - 0.1 V
AC Electrical Characteristics
NMC27tM28Bt2
Symbol Parameter Conditions E150, M150 E200, M200 Units
Min Max Min Max
tACC Addressto Output Delay TEE: =05; " 150 200 ns
tCE CE to Output Delay UE = VIL, PREM = VIH 150 200 ns
tog Ofto Output Delay E = VIL, ptTM = VIH 60 75 ns
t0; UE High to Output Float CE = ihu, Ftrs, = " o 50 o 55 ns
tCF E High to Output Float b? = VIL, W = " 50 0 55 ns
tOH Output Hold from Addresses, tX = CE == W.
TS? or UE, Whichever pG17 = VIH O 0 ns
Occurred First
NMC27C1288
Capacitance TA = +25'C, f = 1 MHz (Note 2)
Symbol Parameter Cottditltttttt Typ Max Units
CIN Input Capacitance VIN = 0V 6 12 pF
COUT Output Capacitance VOUT = 0V 9 12 pF
AC Test Conditions
Output Load 1 TTL Gate and Timing Measurement Reference Level
th. = 100 PF (Note 8) Inputs o.av and 2V
Input Rise and Fall Times $5 ns Outputs 0.8V and 2V
Input Pulse Levels 0.45V to 2.4V
AC Waveforms (Notes 6, 7 a 9)
ADDRESSES 2.0Y ADDRESSES VALID 4’:
- - t,___
CE 0.8V ff ot t
J) - cr---
ics NOTES4.5)
- 2.0V Iii
OE o.av 'f, y
toE tor
2.OV H I A(NOTES) C--,-, +Wm5“: z
. i- l hhhh i-
OUTPUT "it t VALID OUTPUT y,- ""
"trdifk' s)" -tor, ' _
TL/D/9689-3
Note 1: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Note 2: This parameter is only sampled and is not 100% tested.
Note 3: W may be delayed up to hot: - tog after the falling edge of tTE without impacting tacc.
Note 4: The ID; and to; compare level is determined as follows:
High to TRi-STATE, the measured Vom (DC) --0.10V;
Low to THI-STATE, the measured V0L1 (DC) +0.10V.
Note 5: TRI-STATE may be attained using UE or '
Note tk The power switching characteristics of EPROMs require careful device decoupling. It is recommended that at least a 0.1 uF ceramic capacitor be used on
every device between VCC and GND.
Note 7: The outputs must be restricted to Vcc + 1.0V to avoid latch-up and device damage.
Note 8: 1 TTL Gate: IOL = 1.6 mA, 'OH = -400 MA.
Cc: 100 pF includes fixture capacitance.
Note 9: Vpp may be connected to Vcc except during programming.
Note tty: Inputs and outputs can undershoot to -2.OV tor 20 ns Max.
Programming Characteristics (Notes 1, 2, 3 & 4)
Symbol Parameter Condltions Mln Typ Max Units
us Address Setup Time 1 ps
tOES tX Setup Time 1 p.s
tCES tTE Setup Time E = VIH 1 HS
tras Data Setup Time 1 ps
tvps Vpp Setup Time 1 p3
tvcs Vcc Setup Time 1 p5
tAH Address Hold Time 0 p.s
tDH Data Hold Time 1 p.s
top Output Enable to Output Float Delay CE = " o 60 ns
tpw Program Pulse Width 95 100 105 p.s
tog Data Valid from E CE = " 100 ns
Ipp Vpp Supply Current During 'fir--- " 30 m A
Programming Pulse P M = "
ICC Vcc Supply Current 10 mA
TA Temperature Ambient 20 25 30 'C
Vcc Power Supply Voltage 6.0 6.25 6.5
Vpp Programming Supply Voltage 12.5 12.75 13.0
tFR Input Rise, Fall Time 5 ns
" Input Low Voltage 0.0 0.45 V
VIH Input High Voltage 2.4 4.0 f . V
tiN Input Timing Reference Voltage 0.8 1.5 2.0 V
tOUT Output Timing Reference Voltage 0.8 1.5 2.0 V
Programming Waveforms (Note 3)
ADDRESSES
M” V mu m mu
Note 1: National's standard product warranty applies to devices programmed to specifications described herein.
TL/ D/9689-4
Note 2: Vcc must be applied simultaneously or before Vpp and removed simultaneously or after Vpp. The EPROM must not be inserted into or removed from a
board with voltage applied to Vpp or Vcc.
Noto 3: The maximum absolute allowable voltage which may be applied to the Vpp pin during programming is 14V. Care must be taken when switching the Vpp
supply to prevent any overshoot from exceeding this 14V maximum specification. At least a 0.1 pF capacitor is required across Vpp, Vcc to GND to suppress
spurious voltage transients which may damage the device.
Note 4: Programming and program verify are tested with the fast Program Algorithm, at typical power supply voltages and timings.
GBZlOLZOWN
NMCZ7C128B
Fast Programming Algorithm Flow Chart (Note4)
y = s.25v
vifi,c--" 12.75v
ADDR = FIRST LOCATION
--o( PROGRAM ONE
INCREMENT ADDR
INCREMENT X
VERIFY
LAST ADDR ?
var-. VPP= 5.0V
DEVICE PASSED
FIGURE 1
loops PULSE )
VERIFY ML DEVICE _
am FAILED
"IL DEVICE
FAILED
TL/D/9689-5
Interactive Programming Algorithm Flow Chart (Note 4)
ADDR = FIRST LOCATION
INCREMENT ADDR
-H PROGRAM ONE 0.5 ms PULSE
INCREMENT X
DEVICE
FAILED
LAST ADDR ?
VCC=VPP =5.ov l "
VERIFY
ALL BYTES
DEVICE
FAILED
DEVICE PASSED
FIGURE 2
TL/D/96air-6
883 I-OLZOWN
NMC27C1283
Functional Description
DEVICE OPERATION
The six modes of operation of the NMC27C128B are listed
in Table I. It should be noted that all inputs for the six modes
are at TTL levels. The power supplies required are Vcc and
Vpp. The Vpp power supply must be at 12.75V during the
three programming modes, and must be at Vcc in the other
three modes. The VCC power supply must be at 6.25V dur-
ing the three programming modes, and at 5V in the other
three modes.
Read Mode
The NMC27C128B has two control functions, both of which
must be logically active in order to obtain data at the out-
puts. Chip Enable (E) is the power control and should be
used for device selection. Output Enable (E) is the output
control and should be used to gate data to the output pins,
independent of device selection. The programming pin
(W) should be at ViH except during programming. Assum-
ing that addresses are stable, address access time (M00) is
equal to the delay from E to output (tog). Data is available
at the outputs tog after the falling edge of E, assuming
that E has been low and addresses have been stable for
at least tAcc-los-
The sense amps are clocked for fast access time. Vcc
should therefore be maintained at operating voltage during
read and verify. If Vcc temporarily drops below the spec.
voltage (but not to ground) an address transition must be
performed after the drop to insure proper output data.
Standby Mode
The NM027C1268 has a standby mode which reduces the
active power dissipation by over 99%, from 110 mW to
0.55 mW. The NMC27C128B is placed in the standby mode
by applying a CMOS high signal to the UE input. When in
standby mode, the outputs are in a high impedance stats,
independent of the E input.
Output OR-Tylng
Because NMC27C128Bs are usually used in larger memory
arrays, National has provided a 2-line control function that
accommodates this use of multiple memory connections.
The 2-line control function allows for:
a) the lowest possible memory power dissipation, and
b) complete assurance that output bus contention will not
occur.
To most efficiently use these two control lines, it is recom-
mended that CE (pin 20) be decoded and used as the pri-
mary device selecting function, while E (pin 22) be made a
common connection to all devices in the array and connect-
ed to the READ line from the system control bus. This as-
sures that all deselected memory devices are in their low
power standby modes and that the output pins are active
only when data is desired from a particular memory device.
Programming
CAUTION: Exceeding 14V on pin 1 (Vpp) will damage the
NMC27C128B.
Initially, and after each erasure, all bits of the NMC27C128B
are in the "I'' state. Data is introduced by selectively pro-
gramming "Os" into the desired bit locations. Although only
"os" will be programmed, both "Is" and "Os" can be pre-
sented in the data word. The only way to change a "O'' to a
"1 " is by ultraviolet light erasure.
The NMC27C128B is in the programming mode when the
Vpp power supply is at 12.75V and UE is at Vm. It is re-
quired that at least a 0.1 pF capacitor be placed across
Vpp, Vcc to ground to suppress spurious voltage transients
which may damage the device. The data to be programmed
is applied 8 bits in parallel to the data output pins. The levels
required for the address and data inputs are TTL.
For programming, CE should be kept TTL low at all times
while Vpp is kept at 12.75V
When the address and data are stable, an active low, TTL
program pulse is applied to the m input. A program pulse
must be applied at each address location to be pro-
grammed. The NMC27C128B is programmed with the Fast
Programming Algorithm shown in Figure 1. Each Address is
programmed with a series of 100 [,LS pulse!runtil it verifies
good, up to a maximum of 25 pulses. Most memory cells will
program with a single 100 ps pulse.
Note: Some programmer manufacturers due to equipment limitation may
offer interactive program Algorithm (shown in Figure"
The NMC27C128B must not be programmed with a DC sig-
nal applied to the PGM input.
Programming multiple NMC27C128Bs in parallel with the
same data can be easily accomplished due to the simplicity
of the programming requirements. Like inputs of the paral-
leled NMC27C128Bs may be connected together when they
are programmed with the same data. A low level TTL pulse
applied to the P-GM- input programs the paralleled
NMC27C128Bs.
TABLE I. Mode Selection
Pins E E PGM Vpp Vcc Outputs
Mode (20) (22) (27) (1) (23) (11-13, 15-19)
Read " " VIH Vcc 5V DOUT
Standby VIH Don't Don’t Vcc 5V Hi-Z
Care Care
Output Disable Don't Ihr, VI H Vcc 5V Hi-Z
Program " " " 12.75V 6.25V DIN
Program Verify " VI. VIH 12.75V 6.25V DOUT
Program Inhibit " Don't Don’t 12.75V 6.25V Hi-Z
Care Care
Functional Description (Continued)
Program Inhibit
Programming multiple NMC27C128s in parallel with differ-
ent data is also easily accomplished. Except for CE all like
inputs (including ttE and m) of the parallel
NMC27C128Bs may be common. A TTL low level program
pulse applied to an NMC27C128B's m input with C_E at
VIL and Vpp at 12.75V will program that NMC27C128B. A
TTL high level tX input inhibits the other NMC27C128Bs
from being programmed.
Program Verify
A verify should be performed on the programmed bits to
determine whether they were correctly programmed. The
verity may be performed with Vpp at 12.75V. Vpp must be at
Vcc except during programming and program verify.
MANUFACTURER'S IDENTIFICATION CODE
The NMC27C128B has a manufacturer's identification code
to aid in programming. The code, shown in Table II, is two
bytes wide and is stored in a ROM configuration on the chip.
It identifies the manufacturer and the device type. The code
for the NMC27C128B is "8F83", where "8F" designates
that it is made by National Semiconductor, and "83" desig-
nates a 128k part.
The code is accessed by applying 12.0V *0.5V to address
pin A9. Addresses A1-A8, AIO-AIS, CE, and t5E are held
at VIL. Address A0 is held at " for the manufacturer's
code. and at VIH for the device code. The code is read out
on the 8 data pins. Proper code access is only guaranteed
at 25°C 1 5'C.
The primary purpose of the manufacturer’s identification
code is automatic programming control. When the device is
inserted in an EPROM programmer socket, the programmer
reads the code and then automatically calls up the specific
programming algorithm for the part. This automatic pro-
gramming control is only possible with programmers which
have the capability of reading the code.
ERASURE CHARACTERISTICS
The erasure characteristics of the NMC27C128B are such
that erasure begins to occur when exposed to light with
wavelengths shorter than approximately 4000 Angstroms
(A). It should be noted that sunlight and certain types of
fluorescent lamps have wavelengths in the 30o0h-4000h
range.
After programming opaque labels should be placed over the
NMC27C128B's window to prevent unintentional erasure.
Covering the window will also prevent temporary functional
failure due to the generation of photo currents.
The recommended erasure procedure for the
NMC27C128B is exposure to short wave ultraviolet light
which has a wavelength of 2537 Angstroms (A). The inte-
grated dose (i.e., UV intensity M exposure time) for erasure
should be a minimum of 15W-sec/cm2.
The NMC27C128B should be placed within 1 inch of the
lamp tubes during erasure. Some lamps have a filter on their
tubes which should be removed before erasure. Table Ill
shows the minimum NMC27C128B erasure time for various
light intensities.
An erasure system should be caiibrated periodically. The
distance from lamp to unit should be maintained at one inch.
The erasure time increases as the square of the distance. (If
distance is doubled the erasure time increases by a factor of
4.) Lamps lose intensity as they age. When a lamp is
changed, the distance has changed or the lamp has aged,
the system should be checked to make certain full erasure
is occurring. Incomplete erasure will cause symptoms that
can be misleading. Programmers, components, and even
system designs have been erroneously suspected when in-
complete erasure was the problem.
SYSTEM CONSIDERATION
The power switching characteristics of this device require
careful decoupling of the devices. The supply current, be
has three segments that are of interest to the system de-
signer-the standby current level, the active current level,
and the transient current peaks that are produced by volt-
age transitions on input pins. The magnitude of these tran-
sient current peaks is dependent on the output capacitance
loading of the device. The associated Vcc transient voltage
peaks can be suppressed by properly selected decoupling
capacitors. It is recommended that at least a 0.1 pF ceramic
capacitor be used on every device between Vcc and GND.
This should be a high frequency capacitor of low inherent
inductance. In addition, at least a 4.7 pF bulk electrolytic
capacitor should be used between Vcc and GND for each
eight devices. The bulk capacitor should be located near
where the power supply is connected to the array. The pur-
pose of the bulk capacitor is to overcome the voltage drop
caused by the inductive effects of the PC board traces.
TABLE II. Manufacturer’s identification Code
Pins A0 Or 05 Os 04 03 02 th Oo Hex
(10) (19) (18) (17) (16) (15) (13) (12) (11) Data
Manufacturer Code VI. 1 0 0 0 1 1 1 1 BF
Device Code ViH 1 0 0 0 0 0 1 1 83
TABLE III. Minimum NMC27C128B Erasure Time
Light Intensity Erasure Time
(ew/ern') (Minutes)
15,000 20
10,000 25
5,000 50
GSZLOLZOWN
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corp/docs/irwestor_relations/Pr_09_23_201 1_national_semiconductor.html
This file is the datasheet for the following electronic components:
NMC27C128BQE200 - product/nmc27c128bqe200?HQS=TI-nulI-nuIl-dscataIog-df-pf-null-wwe
NMC27C128BQE150 - productlnch7c128bqe150?HQS=Tl-null-nuIl-dscataIog-df-pf-null-wwe
NMC27C128BQ15 - product/nm027c128bq15?HQS=T|-nulI-nulI-dscatalog-df—pf—nuII-wwe
NMC27C128BQ250 - product/nmc27c128bq250?HQS=TI—nu|I—nu|I-dscatalog-df-pf-nulI-wwe
NMC27C128BQ150 - product/nm027c128bq150?HQS=T|-nu|I-nu|I-dscatalog-df-pf-nulI-wwe
NMC27C128BQ200 - product/nm027c128bq200?HQS=TI-nuIl-nu|I-dscatalog-df-pf-nulI-wwe
NMC27C128BQM200 - product/nmc27c128bqm200?HQS=TI-nulI-null-dscatalog-df—pf—nuII-wwe
NMC27C128BQM150 - product/nmc27c128qu150?HQS=TI-nulI—null—dscatalog—df—pf—nuII-wwe
NMC27C128BQ20 - product/nm027c128bq20?HQS=T|-null-null-dscataIog-df-pf-null-wwe
NMC27C128BQ25 - product/nm027c128bq25?HQS=T|-nulI-nulI-dscatalog-df—pf—nuII-wwe
