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NL37WZ14ONN/a3120avaiTriple Inverter, Schmitt
NL37WZ14USONN/a3120avaiTriple Inverter, Schmitt


NL37WZ14 ,Triple Inverter, Schmittthe inputs have hysteresis, and with its Schmitt trigger function, theNL37WZ14 can be used as a lin ..
NL37WZ14US ,Triple Inverter, Schmitt2NL37WZ14DC CHARACTERISTICSV T = 25C 40C  T  85CCC A ASymbol Parameter Condition (V) Min Typ ..
NL37WZ14USG , Triple Schmitt−Trigger Inverter
NL37WZ16 ,Triple BufferELECTRICAL CHARACTERISTICS t = t = 2.5 ns; C = 50 pF; R = 500 ΩÎÎÎÎÎ R F L LT = 25°C 40°C ≤ T ≤ 85 ..
NL37WZ16US ,Triple BufferMaximum Ratings are those values beyond which damage to the device may occur. Exposure to these con ..
NL37WZ16USG , Triple Buffer
NTD110N02R ,Power MOSFET 110 Amps, 24 volts, N-channel, DPAKELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)JCharacteristic Symbol Min Typ Max Unit ..
NTD110N02R-001 ,Power MOSFET 110 Amps, 24 volts, N-channel, DPAKMaximum ratings applied to the device are individual stress limit values (not Gate Source1 2 3norma ..
NTD110N02R-001G ,Power MOSFET 110 Amps, 24 volts, N-channel, DPAKMAXIMUM RATINGS (T = 25°C unless otherwise noted)JRating Symbol Value UnitDrain−to−Source Voltage V ..
NTD110N02RG ,Power MOSFET 110 Amps, 24 volts, N-channel, DPAK3R , DRAIN−TO−SOURCE RESISTANCE R , DRAIN−TO−SOURCE RESISTANCE (Ω) I , DRAIN CURRENT (AMPS)DS(on) D ..
NTD110N02RT4G ,Power MOSFET 110 Amps, 24 volts, N-channel, DPAK2NTD110N02R175 21010 V5 VT = 25°CJ V ≥ 10 VDS8 V150 1804.5 V6 V125 1504.2 V4 V100 1203.8 V75 903.6 ..
NTD12N10G , Power MOSFET 12 Amps, 100 Volts


NL37WZ14-NL37WZ14US
Triple Inverter, Schmitt
the inputs have hysteresis, and with its Schmitt trigger function, theNL37WZ14 can be used as a line receiver which will receive slowMARKINGinput signals. The NL37WZ14 is capable of transforming slowlyDIAGRAMchanging input signals into sharply defined, jitter−free output signals.In addition, it has a greater noise margin than conventional inverters.8The NL37WZ14 has hysteresis between the positive−going and the8negative−going input thresholds (typically 1.0 V) which is determinedinternally by transistor ratios and is essentially insensitive to1 Dtemperature and supply voltage variations. LA• Designed for 1.65 V to 5.5 V V OperationUS8CCUS SUFFIX• Over Voltage Tolerant Inputs and OutputsCASE 4931• LVTTL Compatible − Interface Capability with 5 V TTL Logicwith V = 3 VCC• LVCMOS CompatibleLA = Device CodeD = Date Code• 24 mA Balanced Output Sink and Source Capability• Near Zero Static Supply Current Substantially Reduces SystemPower Requirements• Current Drive Capability is 24 mA at the OutputsPIN ASSIGNMENT• Chip Complexity: FET = 941 IN A12OUT Y33IN A2IN A1 1 8 VCC4 GND5OUT Y2OUT Y3 2 7 OUT Y16IN A37OUT Y18VCCIN A2 3 6 IN A3FUNCTION TABLEGND45 OUT Y2A Input Y OutputL HH LFigure 1. Pinout (Top View)IN A1 OUT Y1ORDERING INFORMATIONIN A2OUT Y2 See detailed ordering and shipping information in the packagedimensions section on page 5 of this data sheet.IN A3 OUT Y3Figure 2. Logic Symbol Semiconductor Components Industries, LLC, 20041 Publication Order Number:March, 2004 − Rev. 3 NL37WZ14/DNL37WZ14
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