NDS9933 ,Dual P-Channel Enhancement Mode Field Effect TransistorNDS9933AJanuary 1999NDS9933ADual P-Channel Enhancement Mode Field Effect Transistor
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NDS9933
Dual P-Channel Enhancement Mode Field Effect Transistor
NDS9933A January 1999 NDS9933A Dual P-Channel Enhancement Mode Field Effect Transistor Features General Description This P-Channel enhancement mode power field ef- • -2.8 A, -20 V. R = 0.14 Ω @ V = -4.5 V DS(on) GS fect transistor is produced using Fairchild’s propri- R = 0.19 Ω @ V = -2.7 V DS(on) GS etary, high cell density, DMOS technology. This very R = 0.20 Ω @ V = -2.5 V. high density process is especially tailored to mini- DS(on) GS mize on-state resistance and provide superior • High density cell design for extremely low R . DS(on) switching performance. These devices are particularly suited for low voltage • High power and current handling capability in a apllications such as DC motor control and DC/ widely used surface mount package. DC conversion where fast switching,low in-line • Dual MOSFET in surface mount package. power loss, and resistance to transients are needed. D2 D2 4 5 D1 D1 6 3 2 G1 7 S2 SO-8 G1 8 1 S1 T = 25°C unless otherwise noted Absolute Maximum Ratings A Symbol Parameter NDS9933A Units V Drain-Source Voltage -20 V DSS V Gate-Source Voltage 8V GSS ± I Drain Current - Continuous (Note 1a) -2.8 A D - Pulsed -10 PD Power Dissipation for Dual Operation 2 W Power Dissipation for Single Operation (Note 1a) 1.6 (Note 1b) 1 (Note 1c) 0.9 T , T Operating and Storage Junction Temperature Range -55 to +150 C J stg ° Thermal Characteristics R Thermal Resistance, Junction-to-Ambient (Note 1a) 78 C/W JA ° θ R Thermal Resistance, Junction-to-Case (Note 1) 40 C/W JC ° θ Package Outlines and Ordering Information Device Marking Device Reel Size Tape Width Quantity NDS9933A NDS9933A 13’’ 12mm 2500 units 1999 NDS9933A Rev. A
