NDS331 ,N-Channel Logic Level Enhancement Mode Field Effect TransistorELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)ASymbol Parameter Conditions Min Typ Ma ..
NDS332 ,P-Channel Logic Level Enhancement Mode Field Effect TransistorElectrical Characteristics (T = 25°C unless otherwise noted)ASymbol Parameter Conditions Min Typ Ma ..
NDS335 ,N-Channel Logic Level Enhancement Mode Field Effect Transistorapplications in notebook computers, portable phones, PCMCIAand electrical capabilities.cards, and o ..
NDS335 ,N-Channel Logic Level Enhancement Mode Field Effect TransistorElectrical Characteristics (T = 25°C unless otherwise noted)ASymbol Parameter Conditions Min Typ Ma ..
NDS335N ,N-Channel Logic Level Enhancement Mode Field Effect TransistorJuly 1996 NDS335N N-Channel Logic Level Enhancement Mode Field Effect Transistor
NDS335N_NL ,N-Channel Logic Level Enhancement Mode Field Effect TransistorElectrical Characteristics (T = 25°C unless otherwise noted)ASymbol Parameter Conditions Min Typ Ma ..
NJU4051B , SINGLE 8-CHANNEL MULTIPLEXER
NJU4051BM , SINGLE 8-CHANNEL MULTIPLEXER
NJU4052B , DUAL 4-CHANNEL MULTIPLEXER
NJU4052B , DUAL 4-CHANNEL MULTIPLEXER
NJU4052BD , DUAL 4-CHANNEL MULTIPLEXER
NJU4052BD , DUAL 4-CHANNEL MULTIPLEXER
NDS331
N-Channel Logic Level Enhancement Mode Field Effect Transistor
July 1996 NDS331N N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description Features These N-Channel logic level enhancement mode power field 1.3 A, 20 V. R = 0.21 W @ V = 2.7 V DS(ON) GS effect transistors are produced using Fairchild's proprietary, R = 0.16 W @ V = 4.5 V. DS(ON) GS high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. Industry standard outline SOT-23 surface mount package TM These devices are particularly suited for low voltage using poprietary SuperSOT -3 design for superior thermal and electrical capabilities. applications in notebook computers, portable phones, PCMCIA cards, and other battery powered circuits where fast High density cell design for extremely low R . DS(ON) switching, and low in-line power loss are needed in a very small outline surface mount package. Exceptional on-resistance and maximum DC current capability. _______________________________________________________________________________ D G S Absolute Maximum Ratings T = 25°C unless otherwise noted A Symbol Parameter NDS331N Units V Drain-Source Voltage 20 V DSS V Gate-Source Voltage - Continuous 8 V GSS I Maximum Drain Current - Continuous (Note 1a) 1.3 A D - Pulsed 10 P Maximum Power Dissipation (Note 1a) 0.5 W D (Note 1b) 0.46 Operating and Storage Temperature Range -55 to 150 °C T ,T J STG THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient 250 °C/W R JA q (Note 1a) Thermal Resistance, Junction-to-Case (Note 1) 75 °C/W R JC q © 1997 NDS331N Rev.E
