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NDP6060.
N-Channel Enhancement Mode Field Effect Transistor
March 1996
NDP6060 / N DB60 60
N-Channel Enhancement M ode Field Effect Transistor
General Description Features ________________________________________________________________________________
Absolute M aximum Ratings TC = 25°C unless otherwise noted
Symbol Parameter NDP6060 NDB6060 UnitsDSS Drain-Source Voltage 60 VDGR Drain-Gate Voltage (R GS < 1 MΩ) 60 VGSS Gate-Source Voltage - Continuous ± 20 V
- Nonrepetitive (tP < 50 μs) ± 40 Drain Current - Continuous Tc=25oC 48 A
- Continuous TC =100oC 32
- Pulsed 144D Total Power Dissipation @ T C = 25°C 100 W
Derate above 25°C 0.67 W/°CJ,TSTG Operating and Storage Temperature Range -65 to 175 °C Maximum lead temperature for soldering
purposes, 1/8" from case for 5 seconds
275 °C
These N-Channel enhancement mode power field
effect transistors are produced using National's
proprietary, high cell density, DMOS technology.
This very high density process has been especially
tailored to minimize on-state resistance, provide
superior switching performance, and withstand high
energy pulses in the avalanche and commutation
modes. These devices are particularly suited for low
voltage applications such as automotive, DC/DC
converters, PWM motor controls, and other battery
powered circuits where fast switching, low in-line
power loss, and resistance to transients are needed.
48A, 60V. R DS(ON) = 0.025Ω @ VGS =10V.
Critical DC electrical parameters specified at
elevated temperature.
Rugged internal source-drain diode can eliminate
the need for an external Zener diode transient
suppressor.
175°C maximum junction temperature rating.
High density cell design for extremely low R DS(ON).
TO-220 and TO-263 (D2 PAK) package for both
through hole and surface mount applications.
