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NDC7002N_NLFAIRCHILN/a3000avaiDual N-Channel Enhancement Mode Field Effect Transistor


NDC7002N_NL ,Dual N-Channel Enhancement Mode Field Effect TransistorELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)ASymbol Parameter Conditions Min Typ Ma ..
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NDC7002N_NL
Dual N-Channel Enhancement Mode Field Effect Transistor
March 1996 NDC7002N Dual N-Channel Enhancement Mode Field Effect Transistor General Description Features These dual N-Channel enhancement mode power field 0.51A, 50V, R = 2W @ V =10V DS(ON) GS effect transistors are produced using Fairchild's High density cell design for low R . DS(ON) proprietary, high cell density, DMOS technology. This TM very high density process has been designed to minimize Proprietary SuperSOT -6 package design using copper on-state resistance, provide rugged and reliable lead frame for superior thermal and electrical capabilities. performance and fast switching. These devices is High saturation current. particularly suited for low voltage applications requiring a low current high side switch. ____________________________________________________________________________________________ 3 4 2 5 6 1 TM SOT-6 (SuperSOT -6) Absolute Maximum RatingsT = 25°C unless otherwise noted A Symbol Parameter NDC7002N Units V Drain-Source Voltage 50 V DSS V Gate-Source Voltage - Continuous 20 V GSS I Drain Current - Continuous (Note 1a) 0.51 A D - Pulsed 1.5 P Maximum Power Dissipation (Note 1a) 0.96 W D (Note 1b) 0.9 (Note 1c) 0.7 T ,T Operating and Storage Temperature Range -55 to 150 °C J STG THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient (Note 1a) 130 °C/W R JA q Thermal Resistance, Junction-to-Case (Note 1) 60 °C/W R qJC © 1997 NDC7002N.SAM
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