NDC631N ,N-Channel Logic Level Enhancement Mode Field Effect Transistorapplications in notebook computers, portable High density cell design for extremely low R .DS(ON)ph ..
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NDC631N
N-Channel Logic Level Enhancement Mode Field Effect Transistor
May 1996
ADVANCE INFORM ATION
NDC6 31N
N-Channel Logic Level Enhancement M ode Field Effect Transistor
General Description Features_____________________________________________________________________________________________
Absolute Maximum Ratings TA = 25°C unless otherwise note
Symbol Parameter NDC631N UnitsDSS Drain-Source Voltage 20 V
VGSS Gate-Source Voltage - Continuous 8 VD Drain Current - Continuous (Note 1a) 4 A
- Pulsed 12 Maximum Power Dissipation (Note 1a) 1.6 W
(Note 1b) 1
(Note 1c) 0.8
TJ,TSTG Operating and Storage Temperature Range -55 to 150 °C
THERMAL CHARACTERISTICSθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/WθJC Thermal Resistance, Junction-to-Case (Note 1) 30 °C/W
These N-Channel logic level enhancement mode
power field effect transistors are produced using
Nationals proprietary, high cell density, DMOS
technology. This very high density process is
tailored to minimize on-state resistance. These
devices are particularly suited for low voltage
applications in notebook computers, portable
phones, PCMICA cards, and other battery powered
circuits where fast switching, and low in-line power
loss are needed in a very small outline surface
mount package.
4A, 20V. R DS(ON) = 0.06Ω @ VGS = 4.5V
R DS(ON) = 0.1Ω @ VGS = 2.7V.
Proprietary SuperSOTTM -6 package design using
copper lead frame for superior thermal and
electrical capabilities.
High density cell design for extremely low RDS(ON).
Exceptional on-resistance and maximum DC
current capability.
SuperSOTTM-6
