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NCP5322AONN/a50avaiTwo-Phase Buck Controller with Integrated Gate Drivers and 5-Bit DAC
NCP5322AMOTN/a50avaiTwo-Phase Buck Controller with Integrated Gate Drivers and 5-Bit DAC
NCP5322ADWR2MOTN/a810avaiTwo-Phase Buck Controller with Integrated Gate Drivers and 5-Bit DAC


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NCP5322A-NCP5322ADWR2
Two-Phase Buck Controller with Integrated Gate Drivers and 5-Bit DAC
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The NCP5322A is a second–generation, two–phase step down
controller which incorporates all control functions required to power
high performance processors and high current power supplies.
Proprietary multi–phase architecture guarantees balanced load current
distribution and reduces overall solution cost in high current
applications. Enhanced V2  control architecture provides the fastest
possible transient response, excellent overall regulation, and ease of
use. The NCP5322A is a second–generation PWM controller because
it optimizes transient response by combining traditional Enhanced V2
with an internal PWM ramp and fast–feedback directly from VCORE to
the internal PWM comparator. These enhancements provide greater
design flexibility, facilitate use and reduce output voltage jitter.
The NCP5322A multi–phase architecture reduces output voltage
and input current ripple, allowing for a significant reduction in filter
size and inductor values with a corresponding increase in inductor
current slew rate. This approach allows a considerable reduction in
input and output capacitor requirements, as well as reducing overall
solution size and cost.
Features
• Enhanced V2 Control Method with Internal Ramp Internal PWM Ramp Fast–Feedback Directly from VCORE 5–Bit DAC with 1.0% Accuracy Adjustable Output Voltage Positioning 4 On–Board Gate Drivers 200 kHz to 800 kHz Operation Set by Resistor Current Sensed through Buck Inductors or Sense Resistors Hiccup Mode Current Limit Individual Current Limits for Each Phase On–Board Current Sense Amplifiers 3.3 V, 1.0 mA Reference Output 5.0 V and/or 12 V Operation On/Off Control (through Soft Start Pin) Power Good Output with Internal Delay
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