NC7WZ86L8X ,TinyLogic UHS Dual 2-Input Exclusive-OR GateElectrical CharacteristicsV T = +25°CT = −40°C to +85°CCC A ASymbol Parameter Units Conditions(V) M ..
NC7WZ86L8X ,TinyLogic UHS Dual 2-Input Exclusive-OR GateNC7WZ86 TinyLogic UHS Dual 2-Input Exclusive-OR GateApril 2000Revised January 2005NC7WZ86TinyLogic ..
NC7WZU04L6X ,TinyLogic UHS Dual Unbuffered InverterFeaturesThe NC7WZU04 is a dual unbuffered inverter from
NC7WZ86K8X-NC7WZ86L8X
TinyLogic UHS Dual 2-Input Exclusive-OR Gate
NC7WZ86 TinyLogic UHS Dual 2-Input Exclusive-OR Gate April 2000 Revised January 2005 NC7WZ86 TinyLogic UHS Dual 2-Input Exclusive-OR Gate General Description Features The NC7WZ86 is a dual 2-Input Exclusive-OR Gate fromSpace saving US8 surface mount package Fairchild’s Ultra High Speed Series of TinyLogic. TheMicroPak Pb-Free leadless package device is fabricated with advanced CMOS technology to Ultra High Speed; t 2.9 ns typ into 50 pF at 5V V PD CC achieve ultra high speed with high output drive while main- High Output Drive; ± 24 mA at 3V V taining low static power dissipation over a very broad V CC CC operating range. The device is specified to operate overBroad V Operating Range; 1.65V to 5.5V CC the 1.65V to 5.5V V range. The inputs and output are CC Matches the performance of LCX when operated at 3.3V high impedance when V is 0V. Inputs tolerate voltages CC Power down high impedance inputs/output up to 7V independent of V operating voltage. CC Overvoltage tolerant inputs facilitate 5V to 3V translation Patented noise/EMI reduction circuitry implemented Ordering Code: Product Order Package Code Package Description Supplied As Number Number Top Mark NC7WZ86K8X MAB08A WZ86 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 3k Units on Tape and Reel NC7WZ86L8X MAC08A N7 Pb-Free 8-Lead MicroPak, 1.6 mm Wide 5k Units on Tape and Reel Pb-Free package per JEDEC J-STD-020B. Logic Symbol Connection Diagrams IEEE/IEC (Top View) Pin Descriptions Pin One Orientation Diagram Pin Names Description A , B Input n n Y Output n Function Table AAA represents Product Code Top Mark - see ordering code Note: Orientation of Top Mark determines Pin One location. Read the top Y = A⊕B product code mark left to right, Pin One is the lower left pin (see diagram). Inputs Output Pad Assignments for MicroPak AB Y LLL LH H HL H HH L H = HIGH Logic Level L = LOW Logic Level (Top Thru View) TinyLogic is a registered trademark of . MicroPak is a trademark of . © 2005 DS500272
